• Title/Summary/Keyword: digital-circuit

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Implementation of PPF Controller Using Analog Circuit and Microprocessor (아날로그 회로와 마이크로 프로세서를 이용한 PPF 제어기의 구현)

  • Heo, Seok;Kim, Ki-Young;Kwak, Moon-Kyu
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.14 no.6
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    • pp.455-462
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    • 2004
  • This paper is concerned with the implementation of the active vibration suppression controller using analog circuit and microprocessor. The target active vibration controller is the positive position feedback(PPF) controller since it provides a simple algorithm suitable for both analog circuit and digital controllers. In this study, the analog PPF controller is realized using an operational amplifier and the digital PPF controller is realized using a low-cost micro-controller. The circuit diagrams are explained in detail. We then discuss the advantages and disadvantages of both methods from the view of practical implementation. Experimental results show that both implementation methods can be effectively used for the active vibration control but need to be chosen based on the mission objective.

Loss Analysis of Pulse Type Inverter Circuit for PLS (PLS용 펄스형 인버터 회로의 손실분석)

  • Jung Yong-Chae;Jung Yun-Chul;Kim Eui-Sung
    • Proceedings of the KIPE Conference
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    • 2006.06a
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    • pp.146-148
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    • 2006
  • The aim of the paper is to design the PLS(Plasma Lighting System) driving inverter circuit with optimal efficiency. In general, it is known that the PLS driven by a pulse has a higher light-conversion efficiency. There are the Class-E type resonant inverter and the semi-bridge inverter as a circuit which can make a pulse with low duty ratio. In this paper, we analyze the losses of the above two circuits. To verify the loss analysis, the inverter circuit with 220V 380W input consumption is manufactured and tested. Throughout the experimental results, the high efficiency PLS system has confirmed.

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Miniaturized Sensor Interface Circuit for Respiration Detection System (호흡 검출 시스템을 위한 초소형 센서 인터페이스 회로)

  • Jo, Sung-Hun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.8
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    • pp.1130-1133
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    • 2021
  • In this paper, a miniaturized sensor interface circuit for the respiration detection system is proposed. Respiratory diagnosis is one of the main ways to predict various diseases. The proposed system consists of respiration detection sensor, temperature sensor, and interface circuits. Electrochemical type gas sensor using solid electrolytes is adopted for respiration detection. Proposed system performs sensing, amplification, analog-to-digital conversion, digital signal processing, and i2c communication. And also proposed system has a small form factor and low-cost characteristics through optimization and miniaturization of the circuit structure. Moreover, technique for sensor degradation compensation is introduced to obtain high accuracy. The size of proposed system is about 1.36 cm2.

A Variable Hysteresis Comparator Circuit Controlled by Serial Digital Bits Against Jamming (교란 방어를 위하여 히스테리시스가 시리얼로 제어되는 가변 비교기 회로)

  • Kim, Young-Gi
    • Journal of IKEEE
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    • v.16 no.1
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    • pp.20-27
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    • 2012
  • In order to overcome jamming, a hysteresis tunable monolithic comparator circuit based on a 0.35 ${\mu}m$ CMOS process is suggested, designed, fabricated, measured and analyzed in this paper. To tune the threshold voltage of the hysteresis in the comparator circuit, two external digital bits are used with supply voltage of 3.3V. An improved variable hysteresis comparator circuit controlled by serial digital bits is suggested, designed and simulated to overcome jamming in modern warfare.

Design of Digital Circuit Structure Based on Evolutionary Algorithm Method

  • Chong, K.H.;Aris, I.B.;Bashi, S.M.;Koh, S.P.
    • Journal of Electrical Engineering and Technology
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    • v.3 no.1
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    • pp.43-51
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    • 2008
  • Evolutionary Algorithms (EAs) cover all the applications involving the use of Evolutionary Computation in electronic system design. It is largely applied to complex optimization problems. EAs introduce a new idea for automatic design of electronic systems; instead of imagine model, ions, and conventional techniques, it uses search algorithm to design a circuit. In this paper, a method for automatic optimization of the digital circuit design method has been introduced. This method is based on randomized search techniques mimicking natural genetic evolution. The proposed method is an iterative procedure that consists of a constant-size population of individuals, each one encoding a possible solution in a given problem space. The structure of the circuit is encoded into a one-dimensional genotype as represented by a finite string of bits. A number of bit strings is used to represent the wires connection between the level and 7 types of possible logic gates; XOR, XNOR, NAND, NOR, AND, OR, NOT 1, and NOT 2. The structure of gates are arranged in an $m{\times}n$ matrix form in which m is the number of input variables.

Circuit Design for Digital Random Bit Synchronization (디지틀 랜덤 비트 동기 회로 설계)

  • 오현서;박상영;백창현;이홍섭
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.5
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    • pp.787-795
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    • 1994
  • In this paper, we have proposed a bit synchronization algorithm which extracts the synchronized clock for random NRZ signal and designed a circuit followed by its performance analysis. The synchronization circuit consists of the Data Transition Detector and Mod 64 Counter, Phase Comparison and Controller, 64 Divider. The data input rate and master clock rate are 16 Kbps and 4.096MHz, respectively. The phase is compensated by 1/64 of the data signal period for every data bit. Through a series of experiments, the maximum immunity of phase jiter for input signal and the deviation of the recovered clock are measured 23.8% and 1.6%, respectively. The fully digital synchronization circuit is simple to implement into signal IC chip and also effective for the low speed digital mobile communications.

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Digital-controlled Single-phase Power-factor Correction Converter Operating in Critical Current Conduction Mode (임계전류도통모드로 동작하는 디지털제어 단상 역률개선 컨버터)

  • Jeong, Gang-Youl
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.7
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    • pp.2570-2578
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    • 2010
  • This paper presents a digital-controlled single-phase power-factor correction (PFC) converter operating in critical current conduction mode. The proposed converter utilizes the DC-DC boost converter topology for the PFC and operates the inductor current in critical conduction mode. Because the proposed converter is controlled digitally using a micom, its control circuit is simplified and the converter operates more effectively. This paper first explains the operational principles of the proposed converter and then analyzes the converter circuit. And this paper explains the implementation method of proposed converter with a detail design example, which is divided into software and circuit design parts. Also, it is shown through the experimental results of the prototype converter by the designed circuit parameters that the proposed converter has good performance as a single-phase PFC converter.

A 13.56 MHz Radio Frequency Identification Transponder Analog Front End Using a Dynamically Enabled Digital Phase Locked Loop

  • Choi, Moon-Ho;Yang, Byung-Do;Kim, Nam-Soo;Kim, Yeong-Seuk;Lee, Soo-Joo;Na, Kee-Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.1
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    • pp.20-23
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    • 2010
  • The analog front end (AFE) of a radio frequency identification transponder using the ISO 14443 type A standard with a 100% amplitude shift keying (ASK) modulation is proposed in this paper and verified by circuit simulations and measurements. This AFE circuit, using a 13.56 MHz carrier frequency, consists of a rectifier, a modulator, a demodulator, a regulator, a power on reset, and a dynamically enabled digital phase locked loop (DPLL). The DPLL, with a charge pump enable circuit, was used to recover the clock of a 100% modulated ASK signal during the pause period. A high voltage lateral double diffused metal-oxide semiconductor transistor was used to protect the rectifier and the clock recovery circuit from high voltages. The proposed AFE was fabricated using the $0.18\;{\mu}m$ standard CMOS process, with an AFE core size of $350\;{\mu}m\;{\times}\;230\;{\mu}m$. The measurement results show that the DPLL, using a demodulator output signal, generates a constant 1.695 MHz clock during the pause period of the 100% ASK signal.

Digital Control of a Power Factor Correction Boost Rectifier Using Diode Current Sensing Technique

  • Shin, Jong-Won;Hyeon, Byeong-Cheol;Cho, Bo-Hyung
    • Journal of Power Electronics
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    • v.9 no.6
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    • pp.903-910
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    • 2009
  • In this paper, a digital average current mode control using diode current sensing technique is proposed. Although the conventional inductor current sensing technique is widely used, the sensed signal of the current is negative. As a result, it requires an additional circuit to be applied to general digital controller ICs. The proposed diode current sensing method not only minimizes the peripheral circuit around the digital IC but also consumes less power to sense current information than the inductor current sensing method. The feasibility of the proposed technique is verified by experiments using a 500W power factor correction (PFC) boost rectifier.