• Title/Summary/Keyword: d-q 변환

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The research on the AC machine modeling using the d-q transform (d - q 변환을 이용한 교류기 모델링에 관한 연구)

  • Park, Jin-Ho;Hong, Sun-Ki;Kim, Beom-Hun
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1878-1879
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    • 2011
  • 주로 사용하는 3상 교류 전동기는 3상의 전압, 전류가 인가되며, 이 3상인 a, b, c상 변수들을 변환하여 d. q, 0축으로 이루어진 직교 좌표계상의 변수로 변환하는 것을 좌표 변환 이라고 하며 통상적으로 교류기의 모델링 또는 해석 시 이 방식을 통하여 실행한다. 기본적으로 좌표 변환 즉 d - q변환은 사용하나 그 이후에 d축과 q축의 전류와 자속쇄교수 구해가는 방식과 d축과 q축을 해석하는 관점의 변화에 따라 모델링에 사용되는 수식이 변환하며 이러한 수식들을 활용하여 모델링을 함으로써 서로의 장단점을 비교하며, 그 비교를 통하여 교류기에 이론적으로 더 근접하고 단순화된 모델링에 대해 연구했다. 그래서 본론에서는 3가지 모델링을 비교한다. 각각의 모델링마다의 장점과 단점이 있으며 그러한 장단점을 비교하여 교류기에 더 근접한 모델링을 결정했다.

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A New Controller of Single Phase Active Power Filter Using Rotating Synchronous Frame d-q Transformation (회전하는 동기 좌표계 d-q 변환을 이용한 단상 능동 전력 필터의 새로운 제어기)

  • Kang, Min Gu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.6
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    • pp.271-275
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    • 2014
  • A New Single Phase Active Power Filter Controller is proposed using Rotating Synchronous Frame d-q transformation. Instantaneous Active Power is calculated using d-q transformation. Average Value of Instantaneous Active Power is obtained using Low Pass Filter. Because power factor is corrected, source current is in phase with source voltage. Amplitude of source current is calculated using single phase power formula. Reference signal of compensated current of Active power filter is obtained from source current reference signal minus load current. Simulation is performed using hysteresis current controller in proposed new controller. Simulation result shows that because active power filter compensates load current, source current is in phase with source voltage and source current is sinusoidal. And Hilbert transformer is builded using all pass filter.

Single-Phase Grid-Connected Power Converter of the PLL Error Compensation Method Using d-q Coordinate Transformation (d-q 좌표 변환 기법을 이용한 단상 계통 연계형 전력변환기의 PLL 오차 보상기법)

  • Park, Chang-Seok;Kam, Seung-Han;Jung, Tae-Uk
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.1064-1065
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    • 2015
  • 단상 계통 연계형 전력 변환기에서 계통과 연계하기 위해서는 계통의 위상 정보를 정확히 측정하여 전력 변환기의 출력 주파수와 위상이 동일한 상태로 전류가 공급 되도록 해야 한다. 본 논문에서는 단상 d-q 좌표 변환 기법을 통한 위상 동기화 기법을 적용하여 왜곡된 계통전압이 d축 전압에 야기 되는 에러 성분을 최소화 하는 보상 기법을 제안한다. 제안된 기법은 동기 d축 전압을 일정한 주기로 적분하여 에러 성분을 최소화 한 후, PI제어를 통해 d축 전압을 0으로 수렴하게 하는 기법이다. 제안된 기법은 추가적인 하드웨어를 요구하지 않는다. 본 논문의 타당성을 검증하기 위해 3[kW]급 단상 계통 연계형 전력변환기 시작품을 제작하고 실험을 통해 증명하였다.

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Prediction of Covid-19 confirmed number of cases using SARIMA model (SARIMA모형을 이용한 코로나19 확진자수 예측)

  • Kim, Jae-Ho;Kim, Jang-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.1
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    • pp.58-63
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    • 2022
  • The daily number of confirmed cases of Coronavirus disease 2019(COVID-19) ranges between 1,000 and 2,000. Despite higher vaccination rates, the number of confirmed cases continues to increase. The Mu variant of COVID-19 reported in some countries by WHO has been identified in Korea. In this study, we predicted the number of confirmed COVID-19 cases in Korea using the SARIMA for the Covid-19 prevention strategy. Trends and seasonality were observed in the data, and the ADF Test and KPSS Test was used accordingly. Order determination of the SARIMA(p,d,q)(P, D, Q, S) model helped in extracting the values of p, d, q, P, D, and Q parameters. After deducing the p and q parameters using ACF and PACF, the data were transformed and schematized into stationary forms through difference, log transformation, and seasonality removal. If seasonality appears, first determine S, then SARIMA P, D, Q, and finally determine ARIMA p, d, q using ACF and PACF for the order excluding seasonality.

A Study on the D-Q Control based Output Voltage Control Algorithm and EMTP-RV Simulation of Three-phase 6-Pulse PWM Rectifier (3상 6펄스 PWM 정류기의 D-Q 제어 기반 출력전압 제어 알고리즘 및 EMTP-RV 시뮬레이션 연구)

  • Ko, Yun-Seok
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.1
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    • pp.45-52
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    • 2021
  • The space vector control based voltage control method for a three-phase PWM rectifier requires a lot of effort to design an optimal switching pattern since a switching pattern for the switching section must be designed. In this study, a D-Q control based SPWM output voltage control algorithm was studied for the three-phase six-pulse CVS type rectifier. In the output voltage control algorithm, three-phase reference signals are obtained from the D-Q transformation based on the space vector representation method, instead of the switching pattern, SPWM method is used to generate rectifier switching control signals. Next, a three-phase six-pulse CVS PWM rectifier based on D-Q transformation and SPWM was modeled using EMTP-RV. Finally, the validity of the D-Q control-based SPWM voltage control algorithm was confirmed by comparing the output voltage waveform obtained through EMTP-RV simulation works with a reference value and confirming that the output voltage accurately follows the reference voltage.

I/Q channel regeneration in 6-port junction based direct receiver (직접 변환 수신기를 위한 Six Port에서의 I와 Q채널의 생성)

  • Kim Seayoung;Kim Nak-Myeong;Kim Young-Wan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.6 s.324
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    • pp.1-7
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    • 2004
  • The development of direct receiver techniques is expected to be a solution for future wideband or multi-band wireless systems based on software defined radio. In this Paper, we study the regeneration of I and Q signals for the SDR based direct conversion receiver, so that we can handle a wide bandwidth and maintain maximal flexibility in system utilization. After modeling the basic system considering the real wireless communication environment, and studying the impact of imperfect phase imbalance on the performance of a direct conversion receiver, we propose a suboptimal I and Q signal regeneration algorithm for the system. The proposed algerian regenerates I and Q signals using a real time early-late compensator which effectively estimates phase imbalances and gives feedback in a directreceiver. The proposed algorithm is shown to mitigate the impact of AWGN and improves performance especially at low SNR channel condition. According to the computer simulation, the BER performance of the proposed system is at least about 4 dB better than conventional systems under $45{\~}55$ degrees random phase errors.

An I/Q Channel 12bit 40MS/s Pipeline A/D Converter with DLL Based Duty-Correction Circuit for WLAN (DLL 기반의 듀티 보정 회로를 적용한 무선랜용 I/Q 채널 12비트 40MS/s 파이프라인 A/D변환기)

  • Lee, Jae-Yong;Cho, Sung-Il;Park, Hyun-Mook;Lee, Sang-Min;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.5C
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    • pp.395-402
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    • 2008
  • In this paper, an I/Q channel 12bits 40MS/s Pipeline Analog to Digital Converter that is able to apply to WLAN/WMAN system is proposed. The proposed ADC integrates DLL based duty-correction circuit which corrects the fluctuations in the duksty cycle caused by miniaturization of CMOS devices and faster operating speeds. It is designed as a 1% to 99% input clock duty cycle could be corrected to 50% output duty cycle. The prototype ADC is implemented in a $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process and dissipates 184mW at 1.8V single supply The SNDR of the proposed 12bit ADC is 52dB and SFDR of 59dBc(@Fs=20MHz, Fin=1MHz) is measured.

A 2.4-GHz Low-Power Direct-Conversion Transmitter Based on Current-Mode Operation (전류 모드 동작에 기반한 2.4GHz 저전력 직접 변환 송신기)

  • Choi, Joon-Woo;Lee, Hyung-Su;Choi, Chi-Hoon;Park, Sung-Kyung;Nam, Il-Ku
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.91-96
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    • 2011
  • In this paper, a low-power direct-conversion transmitter based on current-mode operation, which satisfies the IEEE 802.15.4 standard, is proposed and implemented in a $0.13{\mu}m$ CMOS technology. The proposed transmitter consists of DACs, LPFs, variable gain I/Q up-conversion mixer, a divide-by-two circuit with LO buffer, and a drive amplifier. By combining DAC, LPF, and variable gain I/Q up-conversion mixer with a simple current mirror configuration, the transmitter's power consumption is reduced and its linearity is improved. The drive amplifier is a cascode amplifier with gain controls and the 2.4GHz I/Q differential LO signals are generated by a divide-by-two current-mode-logic (CML) circuit with an external 4.8GHz input signal. The implemented transmitter has 30dB of gain control range, 0dBm of maximum transmit output power, 33dBc of local oscillator leakage, and 40dBc of the transmit third harmonic component. The transmitter dissipates 10.2mW from a 1.2V supply and the die area of the transmitter is $1.76mm{\times}1.26mm$.

Improvement in Image Rejection of Multi-Port Junction-based Direct Receivers (다중 접합 기반 수신기의 영상 제거비 평가 및 향상 방법)

  • Park, Hyung Chul
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.9
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    • pp.43-48
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    • 2012
  • This paper presents an iterative single-frequency continuous-wave signal-based I/Q regeneration method for improving image-rejection performance of multi-port junction-based direct receivers (MPDRs). This paper analyzes I/Q regeneration in MPDRs as I/Q mismatch compensation for direct conversion receivers. Based on the analysis, this paper evaluates the accuracy of I/Q regeneration in terms of the image-rejection ratio (IRR). The proposed method improves the IRR performance more than 20 dB compared to existing I/Q regeneration methods. Simulation results show that MPDRs using the proposed method can achieve an IRR of more than 70 dB, and that the bit error rate performances are almost the same as those of conventional coherent demodulators, even in fading channels.