• Title/Summary/Keyword: current-voltage curve

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Effect of Fast Charging Mode on the Degradation of Lithium-Ion Battery: Constant Current vs. Constant Power (정전류/정출력 고속충전 방식에 따른 리튬이온전지의 열화 비교 연구)

  • Park, Sun Ho;Oh, Euntaek;Park, Siyoung;Lim, Jihun;Choi, Jin Hyeok;Lee, Yong Min
    • KEPCO Journal on Electric Power and Energy
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    • v.6 no.2
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    • pp.173-179
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    • 2020
  • Electric vehicles (EVs) using lithium secondary batteries (LIBs) with excellent power and long-term cycle performance are gaining interest as the successors of internal combustion engine (ICE) vehicles. However, there are few systematic researches for fast charging to satisfy customers' needs. In this study, we compare the degradation of LIB where its composition is LiNi0.5Co0.2Mn0.3/Graphite with the constant current and constant power-charging method. The charging speed was set to 1C, 2C, 3C and 4C in the constant current mode and the value of constant power was calculated based on the energy at each charging speed. Therefore, by analyzing the battery degradation based on the same charging energy but different charging method; CP charging method can slow down the battery degradation at a high rate of 3C through the voltage curve, capacity retention and DC-IR. However, when the charging rate was increased by 4C or more, the deviation between the LIBs dominated the degradation than the charging method.

The Fabrication of the Single Crystal Wire from Cu Single Crystal Grown by the Czochralski Method and its Physical Properties (Czochralski법을 이용한 금속 단결정의 성장과 구조적, 전기적 성질에 관한 연구)

  • Park, Jeung-Hun;Cha, Su-Young;Park, Sang-Eon;Kim, Sung-Kyu;Cho, Chae-Ryong;Park, Hyuk-K.;Kim, Hyung-Chan;Jeong, Myung-Hwa;Jeong, Se-Young
    • Korean Journal of Crystallography
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    • v.16 no.2
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    • pp.141-148
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    • 2005
  • It is well known that the general metals have a lot of grain boundaries. The grain boundaries play a negative role to increase the resistivity and to decrease the conductivity. The small resistivity and the large conductivity have been a goal of the material scientists, and no signal noise, perfect signal transfer, and the realization of the real sound are the dream of electronic engineers and audio manias. Generally, oxygen free copper (OFC) and Ohno continuous casting (OCC) copper cables have been used for the purpose of the precise signal transfer and low noise. However they still include a lot of grain boundaries. In our study, we have grown the single crystal by the Czochralski method and succeeded to produce single crystal wires from the crystal in the dimension of $0.5{\times}0.5{\times}2500mm$. The produced wire still possesses very good single crystal properties. We observed the structure of the wire, and measured the resistance and impedance. Glow Discharge Spectrometer (GDS) was used for analyzing the compositions of copper single crystals and commercial copper. Current-Voltage curve, resistance, total harmonic distortion and speaker frequency response were measured for comparing electrical and acoustic properties of two samples.

Effects of various cone-beam computed tomography settings on the detection of recurrent caries under restorations in extracted primary teeth

  • Kamburoglu, Kivanc;Sonmez, Gul;Berktas, Zeynep Serap;Kurt, Hakan;Ozen, Dogukan
    • Imaging Science in Dentistry
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    • v.47 no.2
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    • pp.109-115
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    • 2017
  • Purpose: The aim of this study was to assess the ex vivo diagnostic ability of 9 different cone-beam computed tomography (CBCT) settings in the detection of recurrent caries under amalgam restorations in primary teeth. Materials and Methods: Fifty-two primary teeth were used. Twenty-six teeth had dentine caries and 26 teeth did not have dentine caries. Black class II cavities were prepared and restored with amalgam. In the 26 carious teeth, recurrent caries were left under restorations. The other 26 intact teeth that did not have caries served as controls. Teeth were imaged using a $100{\times}90-mm$ field of view and a 0.2-mm voxel size with 9 different CBCT settings. Four observers assessed the images using a 5-point scale. Kappa values were calculated to assess observer agreement. CBCT settings were compared with the gold standard using a receiver operating characteristic analysis. The area under the curve (AUC) values for each setting were compared using the chi-square test, with a significance level of ${\alpha}=.05$. Results: Intraobserver kappa values ranged from 0.366 to 0.664 for observer 1, from 0.311 to 0.447 for observer 2, from 0.597 to 1.000 for observer 3, and from 0.869 to 1 for observer 4. Furthermore, interobserver kappa values among the observers ranged from 0.133 to 0.814 for the first reading and from 0.197 to 0.805 for the second reading. The highest AUC values were found for setting 5 (0.5916) and setting 3 (0.5886), and were not found to be statistically significant(P>.05). Conclusion: Variations in tube voltage and tube current did not affect the detection of recurrent caries under amalgam restorations in primary teeth.

Preparation and Characterization of MFIS Using PT/BFO/$HFO_2$/Si Structures

  • Kim, Kwi-Junga;Jeong, Shin-Woo;Han, Hui-Seong;Han, Dae-Hee;Jeon, Ho-Seung;Im, Jong-Hyun;Park, Byung-Eun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.80-80
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    • 2009
  • Recently, multiferroics have attracted much attention due to their numorous potentials. In this work, we attemped to utilize the multiferroics as an alternative material for ferroelectrics. Ferroelectric materials have been stadied to ferroelectric random access memories, however, some inevitable problems prevent it from inplementation. multiferroics shows a ferroelectricity and has low process temperature $BiFeO_3$(BFO) films have good ferroelectric properties but poor leakage characterization. Thus we tried, in this work, to adopt $HfO_2$ insulating layer for metal-ferroelectric-insulator-semiconductor(MFMIS) structure to surpress to leakage current. $BiFeO_3$(BFO) thin films were fabricared by using a sol-gel method on $HfO_2/Si$ structure. Ferroelectric BFO films on a p-type Si(100)wafer with a $HfO_2$ buffer layer have been fabricated to form a metal-ferroelectric-insulator-semiconductor (MFIS) structure. The $HfO_2$ insulator were deposited by using a sol-gel method. Then, they were carried out a rapid thermal annealing(RTA) furnace at $750\;^{\circ}C$ for 10 min in $N_2$. BFO films on the $HfO_2/Si$ structures were deposited by sol-gel method and they were crystallized rapid thermal annealing in $N_2$ atomsphere at $550\;^{\circ}C$ for 5 min. They were characterized by atomic force microscopy(AFM) and Capacitance-voltage(C-V) curve.

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Characteristics of perylene OTFT fabricated in UHV (초고진공환경에서 제작된 perylene 박막 트랜지스터의 특성)

  • 박대식;강성준;김희중;노명근;황정남
    • Journal of the Korean Vacuum Society
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    • v.13 no.1
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    • pp.9-13
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    • 2004
  • Perylene is an interesting material known to have P-type and N-type characteristics at the same time. We prepared perylene thin-films in ultrahigh vacuum with two different deposition rates of 0.1 $\AA$/s and 1.0 $\AA$/s in order to study the dependence of film characteristics on the growth condition. The smaller average grain size with larger surface coverage as well as the better crystallinity were observed on the perylene film prepared under 1.0 $\AA$/s deposition rate in x-ray diffraction (XRD) and atomic force microscopy (AFM) study. For studying electrical property of the film, perylene organic thin-film transistor (OTFT) with gold contacts was fabricated on $SiO_2$/Si surface in UHV condition. The prepared perylene OTFT device shows P-type characteristic. The obtained hole mobility in the current-voltage characteristic curve was$2.23\times10^{-5}\textrm{cm}^2$/Vs.

Analysis of Instability Mechanism under Simultaneous Positive Gate and Drain Bias Stress in Self-Aligned Top-Gate Amorphous Indium-Zinc-Oxide Thin-Film Transistors

  • Kim, Jonghwa;Choi, Sungju;Jang, Jaeman;Jang, Jun Tae;Kim, Jungmok;Choi, Sung-Jin;Kim, Dong Myong;Kim, Dae Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.5
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    • pp.526-532
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    • 2015
  • We quantitatively investigated instability mechanisms under simultaneous positive gate and drain bias stress (SPGDBS) in self-aligned top-gate amorphous indium-zinc-oxide thin-film transistors. After SPGDBS ($V_{GS}=13V$and $V_{DS}=13V$), the parallel shift of the transfer curve into a negative $V_{GS}$ direction and the increase of on current were observed. In order to quantitatively analyze mechanisms of the SPGDBS-induced negative shift of threshold voltage (${\Delta}V_T$), we experimentally extracted the density-of-state, and then analyzed by comparing and combining measurement data and TCAD simulation. As results, 19% and 81% of ${\Delta}V_T$ were taken to the donor-state creation and the hole trapping, respectively. This donor-state seems to be doubly ionized oxygen vacancy ($V{_O}^{2+}$). In addition, it was also confirmed that the wider channel width corresponds with more negative ${\Delta}V_T$. It means that both the donor-state creation and hole trapping can be enhanced due to the increase in self-heating as the width becomes wider. Lastly, all analyzed results were verified by reproducing transfer curves through TCAD simulation.

Time-resolved Analysis for Electroconvective Instability under Potentiostatic Mode (일정 전위 모드에서의 전기와류 불안정성에 대한 시간-분해 해석)

  • Lee, Hyomin
    • Korean Chemical Engineering Research
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    • v.58 no.2
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    • pp.319-324
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    • 2020
  • Electroconvective instability is a non-linear transport phenomenon which can be found in ion-selective transport system such as electrodialysis, Galvanic cell and electrolytic cell. The instability is triggered by the fluctuation of space charge layer in adjacent of ion-selective surface, leading to increase of mass transport rate. Thus, in the aspect of mass transport, the instability has an important meaning. Although recent experimental techniques have opened up an avenue to direct visualize the instability, fundamental investigations have been conducted in limited area due to several experimental limitations. In this work, the electroconvective instability under potentiostatic mode was solved by numerical method in order to demonstrate correlation between current-time curve and the instability behavior. By rigorous time-resolved analysis, the transition behaviors can be divided into three stages; formation of space charge layer - growth of electroconvective instability - steady state. Furthermore, scaling laws of transition time were numerically obtained according to applied voltage as well.

Characterization of Electrical Properties of Si Nanocrystals Embedded in a SiO$_{2}$ Layer by Scanning Probe Microscopy (Scanning Probe Microscopy를 이용한 국소영역에서의 실리콘 나노크리스탈의 전기적 특성 분석)

  • Kim, Jung-Min;Her, Hyun-Jung;Kang, Chi-Jung;Kim, Yong-Sang
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.10
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    • pp.438-442
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    • 2005
  • Si nanocrystal (Si NC) memory device has several advantages such as better retention, lower operating voltage, reduced punch-through and consequently a smaller cell area, suppressed leakage current. However, the physical and electrical reasons for this behavior are not completely understood but could be related to interface states of Si NCs. In order to find out this effect, we characterized electrical properties of Si NCs embedded in a SiO$_{2}$ layer by scanning probe microscopy (SPM). The Si NCs were generated by the laser ablation method with compressed Si powder and followed by a sharpening oxidation. In this step Si NCs are capped with a thin oxide layer with the thickness of 1$\~$2 nm for isolation and the size control. The size of 51 NCs is in the range of 10$\~$50 m and the density around 10$^{11}$/cm$^{2}$ It also affects the interface states of Si NCs, resulting in the change of electrical properties. Using a conducting tip, the charge was injected directly into each Si NC, and the image contrast change and dC/dV curve shift due to the trapped charges were monitored. The results were compared with C-V characteristics of the conventional MOS capacitor structure.

The Write Characteristics of SONOS NOR-Type Flash Memory with Common Source Line (공통 소스라인을 갖는 SONOS NOR 플래시 메모리의 쓰기 특성)

  • An, Ho-Myoung;Han, Tae-Hyeon;Kim, Joo-Yeon;Kim, Byung-Cheul;Kim, Tae-Geun;Seo, Kwang-Yell
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.35-38
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    • 2002
  • In this paper, the characteristics of channel hot electron (CHE) injection for the write operation in a NOR-type SONOS flash memory with common source line were investigated. The thicknesses of he tunnel oxide, the memory nitride, and the blocking oxide layers for the gate insulator of the fabricated SONOS devices were $34{\AA}$, $73{\AA}$, and $34{\AA}$, respectively. The SONOS devices compared to floating gate devices have many advantages, which are a simpler cell structure, compatibility with conventional logic CMOS process and a superior scalability. For these reasons, the introduction of SONOS device has stimulated. In the conventional SONOS devices, Modified Folwer-Nordheim (MFN) tunneling and CHE injection for writing require high voltages, which are typically in the range of 9 V to 15 V. However CHE injection in our devices was achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The memory window of about 3.2 V and the write speed of $100{\mu}s$ were obtained. Also, the disturbance and drain turn-on leakage during CHE injection were not affected in the SONOS array. These results show that CHE injection can be achieved with a low voltage and single power supply, and applied for the high speed program of the SONOS memory devices.

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Resistive Switching Effect of the $In_2O_3$ Nanoparticles on Monolayered Graphene for Flexible Hybrid Memory Device

  • Lee, Dong Uk;Kim, Dongwook;Oh, Gyujin;Kim, Eun Kyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.396-396
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    • 2013
  • The resistive random access memory (ReRAM) has several advantages to apply next generation non-volatile memory device, because of fast switching time, long retentions, and large memory windows. The high mobility of monolayered graphene showed several possibilities for scale down and electrical property enhancement of memory device. In this study, the monolayered graphene grown by chemical vapor deposition was transferred to $SiO_2$ (100 nm)/Si substrate and glass by using PMMA coating method. For formation of metal-oxide nanoparticles, we used a chemical reaction between metal films and polyamic acid layer. The 50-nm thick BPDA-PDA polyamic acid layer was coated on the graphene layer. Through soft baking at $125^{\circ}C$ or 30 min, solvent in polyimide layer was removed. Then, 5-nm-thick indium layer was deposited by using thermal evaporator at room temperature. And then, the second polyimide layer was coated on the indium thin film. After remove solvent and open bottom graphene layer, the samples were annealed at $400^{\circ}C$ or 1 hr by using furnace in $N_2$ ambient. The average diameter and density of nanoparticle were depending on annealing temperature and times. During annealing process, the metal and oxygen ions combined to create $In_2O_3$ nanoparticle in the polyimide layer. The electrical properties of $In_2O_3$ nanoparticle ReRAM such as current-voltage curve, operation speed and retention discussed for applictions of transparent and flexible hybrid ReRAM device.

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