• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 추계학술대회
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• pp.398-401
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• 2011

본 논문에서는 고효율의 CMOS PWM DC-DC 벅 변환기를 설계하였다. 설계된 CMOS PWM DC-DC 벅 변환기는 입력전압(3.4-3.9V)로부터 일정한 출력전압(1-2.8V)을 생성한다. Inductor-based 방식을 택하였고, 제어 대상은 전류이며, Pulse Width Modulation(PWM) 모드로 동작한다. 회로 구성은 Power Switch, Pulse Width Generation, Buffer, Zero Current Sensing, Current Sensing Circuit, Clock & Ramp generation, V-I Converter, Soft Start, Compensator, Modulator 등 이다. 제안된 CMOS PWM DC-DC 벅 컨버터는 Switching Frequency가 약 1MHz이고, 부하 전류가 약 40mA이상부터 CCM동작을 하며 100mA일 때 98.71%의 최대 효율을 갖는다. 또한, 출력전압 리플은 0.98mV이다(입력전압 3.5V, 출력전압 2.5V 기준). 제안된 회로의 검증을 위해 CMOS $0.18{\mu}m$ 공정을 이용하여 시뮬레이션을 수행하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.967_968
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• 2009

For lighting application, high-power LED nowadays is driven at 350mA and a sensing resistor is used to provide feedback for LED-current regulation. This method adds an IR drop at the output branch, and limits power efficiency as LED current is large and keeps increasing. In this paper, a power efficient LED-current sensing circuit is proposed. The circuit does not use any sensing resistor but extracts LED-current information from the output capacitor of the driver. Controlling the brightness of LEDs requires a driver that provides a constant, regulated current. In one case, the converter may need to step down the input voltage, and, in another, it may need to boost up the output voltage. These situations often arise in applications with wide-ranging ""dirty"" input power sources, such as automotive systems. And, the driver topology must be able to generate a large enough output voltage to forward bias the LEDs. So, to provide this requirements, 13W prototype Buck-Boost Converter is used.

• Journal of Electrical Engineering and Technology
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• 제11권1호
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• pp.241-246
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• 2016

This paper presents a method that can improve the performance of permanent magnet synchronous motor current control by minimizing the measured current phase delay caused by the Low Pass Filter(LPF) used to cut off the noises that flowed in when feedback currents are measured. Although existing methods that change the Cutoff Frequency of the LPF can minimize phase delays during high speed rotations, their noise cutoff effects are much lower and this may lead to the decline of control performance. Therefore, in this study, an algorithm that can compensate current phase delays through relatively simple calculations from the synchronous motor d-q axis coordinate transformation matrix and the inverse transformation matrix is proposed and the validity of the proposed method is verified by comparing the waveform of the calculated current with the waveform of actual currents through simulations and experiments.

• 전자공학회논문지C
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• 제34C권11호
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• pp.1-11
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• 1997

The transient current components of the dRAM are analyzed and the sensing current, data path operation current and DC leakage current are revealed to be the major curretn components. It is expected that the supply voltage of less than 1.5V with low VT MOS witll be used in multi-giga bit dRAM. A low voltage dual VT self-timed CMOS logic in which the subthreshold leakage current path is blocked by a large high-VT MOS is proposed. An active signal at each node of the nature speeds up the signal propagation and enables the synchronous DRAM to adopt a fast pipelining scheme. The sensing current can be reduced by adopting 8 bit prefetch scheme with 1.2V VDD. Although the total cycle time for the sequential 8 bit read is the same as that of the 3.3V conventional DRAM, the sensing current is loered to 0.7mA or less than 2.3% of the current of 3.3V conventional DRAM. 4 stage pipeline scheme is used to rduce the power consumption in the 4 giga bit DRAM data path of which length and RC delay amount to 3 cm and 23.3ns, respectively. A simple wave pipeline scheme is used in the data path where 4 sequential data pulses of 5 ns width are concurrently transferred. With the reduction of the supply voltage from 3.3V to 1.2V, the operation current is lowered from 22mA to 2.5mA while the operation speed is enhanced more than 4 times with 6 ns cycle time.

• 한국항만학회지
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• 제14권3호
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• pp.321-329
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• 2000

Welding is essential for the manufacture of a range of engineering components which may vary from very large structures such as ships and bridges to very complex structures such as aircraft engines, or miniature components for microelectronic applications. Especially, a domestic situation of the welding automation is still depend on the arc sensing system in comparison to the vision sensing system. Specially, the gap-detecting of workpiece using conventional arc sensor is proposed in this study. As a same principle, a welding current varies with the size of a welding gap. This study introduce to the fuzzy membership filter to cancel a high frequency noise of welding current, and ART2 which has the competitive learning network classifies the signal patterns the filtered welding signal. A welding current possesses a specific pattern according to the existence or the size of a welding gap. These specific patterns result in different classification in comparison with an occasion for no welding gap. The patterns in each case of 1mm, 2mm, 3mm and no welding gap are identified by the artificial neural network.

• 전력전자학회논문지
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• 제3권4호
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• pp.280-286
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• 1998

본 논문에서는 벡터제어방식의 인버터에 의하여 구동되는 교류전동기 제어 시스템에서 전류특정회로에서의 측정오차에 기인하는 전동기의 토크리플을 저감하는 방법을 제안한다. 2상의 전류를 측정하는 회로에서의 오프셋 전압과 전압증폭률이 서로 다를 때 전동기 출력토크에 발생되는 리플을 각각 정량적으로 분석하고, 이로부터 온라인 상태에서 실시간으로 토크리플을 제거할 수 있는 알고리즘을 제시하였다. 제안된 방식의 유용성을 확인하기 위하여 이를 영구자석형 동기전동기에 적용하였을 경우에 대하여 출력토크의 리플을 계산하고 이를 제거하는 알고리즘을 컴퓨터로 시뮬레이션하였다.

• Journal of Forest and Environmental Science
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• 제27권2호
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• pp.73-79
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• 2011

The Barind tract is threatened by desertification and undergoing rapid change. In view of this fact it is very much essential to manage this barind tract under proper land-use plan. The present study evaluates the effectiveness of high-resolution satellite data and computer aided GIS techniques in assessing land-use change detection for the period 1990 to 2007 within the study area, which is very much essential to manage this barind tract under proper land-use plan, and for proper land-use plan it is necessary to get reliable information. The present study found five major land-use such as current fallow, current agriculture, settlement, irrigation water and water bodies. From the result, it is found that current fallow and water bodies decrease while settlement and current agriculture increase. Study concludes that as Barind tract is threatened by desertification, decrease of water bodies is not a good sign for the study area.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1788-1792
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• 2005

Eddy current sensor is representative instrument measuring gap to base metal and sensing trouble in base metal. The existing eddy current sensor works as measuring variance of sensor coil's inductance. But, sensor coil have phenomenon that not only inductance but also real resistance varies in real action. Conductivity and Permeability are main variable in sensor coil's varying impedance(inductance, real resistance). By searching relationship between conductivity-permeability and sensor coil's impedance, eddy current sensor gain advantage of elevation of accuracy, removal of alignment to each base metal, and continuous sensing to varying base metal.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1503-1506
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• 2008

A novel white-LED (light emitting diode) backlight system for 46"LCD TVs which involves the current controlled X-Y channel driving method is proposed in this paper. There are two problems related to the LED current in the conventional X-Y channel driving driven by a constant voltage source. To solve these problems, a real time current sensing system is applied to the conventional one and the time-division current sensing method is employed.

• Journal of Power Electronics
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• 제16권5호
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• pp.1650-1660
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• 2016

This paper proposes a compensator to eliminate the DC bias of inductor current. This method utilizes an average-current sensing technique to detect the DC bias of inductor current. A small signal model of the DC bias compensation loop is derived. It is shown that the DC bias has a one-pole relationship with the duty cycle of the left side leading lag. By considering the pole produced by the dual active bridge (DAB) converter and the pole produced by the average-current sensing module, a one-pole-one-zero digital compensation method is given. By using this method, the DC bias is eliminated, and the stability of the compensation loop is ensured. The performance of the proposed compensator is verified with a 1.2-kW DAB converter prototype.