• Journal of IKEEE
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• v.14 no.4
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• pp.257-262
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• 2010

We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.2
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• pp.449-455
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• 2004

This paper presents a novel defect detection method for one chip RF front end with fault detection circuits using input matching measurement. We present a BIST circuit using 40.25{\mu}m$ CMOS technology. We monitor the input transient voltage of the RF front end to differentiate faulty and fault-free RF front end. Catastrophic as well as parametric variation fault models are used to simulate the faulty response of the RF front end. This technique has several advantages with respect to the standard approach based on current test stimulus and frequency domain measurement. Because DUT and fault detection circuits are implemented in the same chip, this test technique only requires use of digital voltmeter (RMS meter) and RF voltage source generator for simpleand inexpensive testing.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.693-696
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• 2006

In this study, we made the system to measure variation of blood flow using bio-electrical impedance analysis method. The system, which could measure variation of impedance according to pressure change by artificial pressure, consists of pressure measurement and impedance measurement by 4-electrode method. Pressure measurement splits into semiconducting pressure sensor and electronic circuit for processing output signal. In addition, impedance measurement splits into constant current source circuit and lock-in amplifier for detection impedance signal. We experimented feature of impedance measurement using standard resistance to evaluate the system characteristic. As well as, we experimented to estimate variation of blood flow by measuring impedance and blood flow resistance ratio using mean arterial pressure and variation of blood flow with experimental group. As result of this study, blood flow resistance ratio and variation of blood flow were definitely in inverse proportion and were -0.96776 as correlation coefficient by correlation analysis.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.788-791
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• 2010

We design 64-bit ROM IP for RFID tag chips using printed CMOS non-volatile memory IP design technology for a printed CMOS process. The proposed 64-bit ROM circuit is using ETRI's $0.8{\mu}m$ CMOS porocess, and is expected to reduce process complexity and cost of RFID tag chips compared to that using a conventional silicon fabrication based on a complex lithography process because the poly layer in a gate terminal is using printing technology of imprint process. And a BL precharge circuit and a BL sense amplifier is not required for the designed cell circuit since it is composed of a transmission gate instead of an NMOS transistor of the conventional ROM circuit. Therefore an output datum is only driven by a DOUT buffer circuit. The Operation current and layout area of the designed ROM of 64 bits with an array of 8 rows and 8 columns using $0.8{\mu}m$ ROM process is $9.86{\mu}A$ and $379.6{\times}418.7{\mu}m^2$.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.4
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• pp.1509-1514
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• 2011

The core of IT products, electronic components, especially the MLCC, chip inductors, chip Varistors and so on. In order to test the electrical characteristics of the chip using the Reno-pin contact test method has been used. In current chips, mass production of semiconductor manufacturing processes, high-speed production test for the chip speed up, precision is required. But Vibration displacement is a very short, so in order to overcome these shortcomings, the displacement amplification to design the structure has been actively studied. In this paper, a building structure with a flexible hinge was designed amplification instrument, semiconductor chip industry in the performance test and inspection equipment to measure the electrical characteristics of high speed linear actuators Reno-Pin using system was developed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.8
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• pp.1926-1938
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• 2009

In this study, detection system of the blood flow variation rate was implemented using the variation effect of bio electric impedance at time of the blood pressure measurement by means of impedance method. The blood pressure measurement was performed by the oscillometric method. The mean arterial pressure was calculated using maximum amplitude algorithm. The systolic and diastolic pressure were estimated by establishment of the various characteristic ratio according to mean arterial pressure range. Alternative static current source and lock_in amplifier were introduced to impedance measurement. The variation of blood volume was measured using variation bio impedance according to induced cuff pressure at measuring area.

• Korean Journal of Optics and Photonics
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• v.1 no.2
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• pp.198-203
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• 1990

In this paper, a system has been proposed for the measurement of the spectral characteristic of semiconductor light sources driven by very short pulse currents. This system has been constituted a monochrometer of 600 groovedmm grating and of 275 mm focal length, X-Y recorder, scanning motor which enables the system to get the analog data, and amplifier coupled with peak detector. Especially, peak detector was used to convert the short pulse signal to continuous one. In order to verify the resolution with slit width, several slits were made by the hands. By using this system, the spectra of commercial LEDs, AlGaAdGaAs LD, and InGaAsPIInP BH-LD which were driven with pulse current (duty cy$e = 0.01) were measured. From these measurements, it has been shown that the proposed system has about 1 A1$\AA$ resolution and 10$\mu$W sensitivity.

• Current Optics and Photonics
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• v.5 no.2
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• pp.186-190
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• 2021

In this study, a compact, picosecond, mid-infrared 3.8 ㎛ MgO:PPLN optical parametric oscillator (OPO) laser output with high peak power is realized using a master oscillator power amplifier (MOPA) 1 ㎛ solid-state laser seeded by a picosecond fiber laser as the pump source. The pump source was a 50 MHz and 10 ps fiber seed source. After AOM pulse selection and two-stage solid-state amplification, a 1,064 nm laser output with a repetition frequency of 1-2 MHz, pulse width of 9.5 ps, and a maximum average power of 20 W was achieved. Furthermore, a compact short cavity with a unsynchronized pump is adopted through the design of an OPO cavity structure. When the injection pump power was 15 W and the repetition frequency was 1 MHz, the average output power of idler light was 1.19 W, and the corresponding peak power was 119 kW. The optical conversion efficiency was 7.93%. When the repetition frequency was increased to 2 MHz, the average output power of idler light was 1.63 W, the corresponding peak power was 81.5 kW, and the optical conversion efficiency was 10.87%. At the same time, the output wavelength was measured at 3,806 nm, and the beam quality was MX2 = 3.21 and MY2 = 3.34.

• Journal of IKEEE
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• v.23 no.3
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• pp.917-924
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• 2019

This paper presents a wideband low noise amplifier (LNA) that is suitable for LTE-Advanced and 5G communication standards employing carrier aggregation (CA). The proposed LNA encompasses a common input stage and a dual output second stage with a buffer at each distinct output. This architecture is targeted to operate in both intra-band (contiguous and non-contiguous) and inter-band CA. In the proposed design, the input and second stages employ a gm enhancement with resistive feedback technique to achieve self-biasing, enhanced gain, wide bandwidth as well as reduced noise figure of the proposed LNA. An up/down power controller controls the single input single out (SISO) and single input multiple outputs (SIMO) modes of operation for inter-band and intra-band operations. The proposed LNA is designed with a 45nm CMOS technology. For SISO mode of operation, the LNA operates from 0.52GHz to 4.29GHz with a maximum power gain of 17.77dB, 2.88dB minimum noise figure and input (output) matching performance better than -10dB. For SIMO mode of operation, the proposed LNA operates from 0.52GHz to 4.44GHz with a maximum voltage gain of 18.30dB, a minimum noise figure of 2.82dB with equally good matching performance. An $IIP_3$ value of -6.7dBm is achieved in both SISO and SIMO operations. with a maximum current of 42mA consumed (LNA+buffer in SIMO operation) from a 1.2V supply.

• Journal of IKEEE
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• v.24 no.4
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• pp.975-981
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• 2020

A 10 GHz LC voltage-controlled oscillator (VCO), which controls an amplitude of output signal, is proposed to improve the phase noise. The proposed amplitude control circuit for the LC VCO consists of a peak detector, an amplifier, and a current source. The peak detector is performed detecting the lowest voltage of the output signal by using two diode-connected NMOSFET and a capacitor. The proposed 10 GHz LC VCO with an amplitude control circuit for output signal is designed using a 55 nm CMOS process with a supply voltage of 1.2 V. Its area is 0.0785 ㎟. The amplitude control circuit used in the proposed LC VCO reduces the amplitude variation 242 mV generated in the output signal of the conventional LC VCO to 47 mV. Furthermore, it improves the peak-to-peak time jitter from 8.71 ps to 931 fs.