• Title/Summary/Keyword: cross-linked PVP

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Dependence of $O_2$ Plasma Treatment of Cross-Linked PVP Insulator on the Electrical Properties of Organic-Inorganic Thin Film Transistors with ZnO Channel Layer

  • Gong, Su-Cheol;Shin, Ik-Sup;Bang, Suk-Hwan;Kim, Hyun-Chul;Ryu, Sang-Ouk;Jeon, Hyeong-Tag;Park, Hyung-Ho;Yu, Chong-Hee;Chang, Ho-Jung
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.2
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    • pp.21-25
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    • 2009
  • The organic-inorganic thin film transistors (OITFTs) with ZnO channel layer and the cross-linked PVP (Poly-4-vinylphenol) gate insulator were fabricated on the patterned ITO gate/glass substrate. ZnO channel layer was deposited by using atomic layer deposition (ALD). In order to improve the electrical properties, $O_2$ plasma treatment onto PVP film was introduced and investigated the effect of the plasma treatments on the electrical properties of the OITFTs. The field effect mobility and sub-threshold slope (SS) values of the OITFT decreased slightly from 0.24 to 0.16 $cm^2/V{\cdot}s$ and from 9.7 to 9.2 V/dec, respectively with increasing RF power from 30 to 50 Watt. The $I_{on/off}$ ratio was about $10^3$ for all samples with $O_2$ plasma treatment.

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유리 기판위에 제작된 PVP 게이트 절연막의 전기적 특성

  • Yang, Sin-Hyeok;Sin, Ik-Seop;Yu, Byeong-Cheol;Gong, Su-Cheol;Jang, Yeong-Cheol;Jang, Ho-Jeong
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2007.06a
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    • pp.218-220
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    • 2007
  • 유기박막트랜지스터(organic thin film transistor, OTFT)의 게이트 절연막으로 PVP(poly-4-vinylphenol) 물질을 이용하여 MIM (metal-insulator-metal) 구조의 캐패시터 소자를 제작하였다. 유기 절연층의 형성은 ITO/Glass 기판 위에 PVP를 용질로, PGMEA(propylene glycol monomethyl ether acetate)를 용매로 사용하였다. 또한 열경화성 수지인 poly(melamine-co-formaldehyde)를 사용하여 cross-linked PVP 절연막을 합성하여 스핀코팅법으로 소자를 형성하였다. 제작된 소자에 대해 절연막 두께에 따른 전기적 특성을 조사한 결과 300 nm 에서 500 nm로 두께가 증가할수록 누설전류는 10.69 nA 에서 0.1 nA 로 크게 감소하였다. 또한 캐패시터 소자의 정전용량은 300 nm 의 두께에서 1.05 nF 으로 500 nm 의 두께에서의 0.65 nF 과 비교하여 보다 양호한 특성이 나타났다.

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Pentacene TFT's Characteristic depending on the Density of PVP Gate Insulator (PVP 게이트 절연체의 농도에 대한 펜타센 TFT의 특성 변화)

  • Byun Hyun-Sook;Xu Yong-Xian;Jung Hyun;Hwang Sung-Beam;Song Chung-Kun
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.375-378
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    • 2004
  • In this paper, we fabricated pantacene TFTs using PVP copolymer and cross-linked PVP as gate insulator on glass and plastic (PET) substrate. Depending on the density of PVP and poly (melamine-co-formaldehyde) the performance has been changed. We obtained the best performance with the mobility of 0.12cm2/V sec and the on/off current ratio of $1.19{\times}10^6$ for the case of $10wt\%$ PVP copolymer mixed with $5wt\%$ poly(melamine-co-formaldehyde). Additionally using OTFTs with the above PVP gate insulator, we fabricated the integrated circuit including inverter which produced the gain of 5.56 on the glass substrate and gain of 9.7 on the plastic (PET) substrate. And the threshold voltage was respectively +8V and +14v$ldots$

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Efficient and Regioselective Ring-Opening of Epoxides with Alcohols and Sodium Azide by using Catalytic Amounts of GaCl3/Polyvinylpyrrolidone

  • Pourali, Ali Reza;Ghayeni, Samaneh;Afghahi, Fatemeh
    • Bulletin of the Korean Chemical Society
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    • v.34 no.6
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    • pp.1741-1744
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    • 2013
  • A new polymeric catalyst was prepared by supporting $GaCl_3$ on cross-linked polyvinylpyrrolidone ($GaCl_3$/PVP). This catalyst was employed for efficient and regioselective ring-opening reaction of epoxides by various alcohols under solvent-free conditions at room temperature. In our procedure, this heterogeneous catalyst was used at neutral and mild reaction conditions to afford high yields of ${\beta}$-alkoxy alcohols. Also, regioselective conversion of epoxides to ${\beta}$-azidohydrines was accomplished by sodium azide in MeOH in the presence of $GaCl_3$/PVP at room temperature. $GaCl_3$/PVP is a non-hygroscopic and recoverable catalyst and is easily separated from reaction mixture by a simple filtration and re-used repeatedly. Also, this catalyst has good handling and can be stored for long time without any reducing of its reactivity.

Electrical Characteristic Analysis of IGZO TFT with Poly (4-vinylphenol) Gate Insulator according to Annealing Temperature (Poly (4-vinylphenol) 게이트 절연체를 적용한 IGZO TFT의 열처리 온도에 따른 전기적 특성 분석)

  • Park, Jung Hyun;Jeong, Jun Kyo;Kim, Yu Jeong;Jun, Jung Byung;Lee, Ga Won
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.1
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    • pp.97-101
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    • 2017
  • In this paper, IGZO thin film transistor (TFT) was fabricated with cross-linked Poly (4-vinylphenol) (PVP) gate dielectric for flexible, transparent display applications. The PVP is one of the candidates for low-temperature gate insulators. MIM structure was fabricated to measure the leakage current and evaluate the insulator properties according to the annealing temperature. Low leakage current ( <0.1nA/cm2 @ 1MV/cm ) was observed at $200^{\circ}C$ annealing condition and decreases much more as the annealing temperature increases. The electrical characteristics of IGZO TFT such as subthreshold swing, mobility and ON/OFF current ratio were also improved, which shows that the performance of IGZO TFTs with PVP can be enhanced by reducing the amount of incomplete crosslinking in PVP.

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Study on OTFT-Backplane for Electrophoretic Display Panel (전기영동 디스플레이 패널용 OTFT-하판 제작 연구)

  • Lee, Myung-Won;Ryu, Gi-Sung;Song, Chung-Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.7
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    • pp.1-8
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    • 2008
  • We fabricated flexible electrophoretic display(EPD) driven by organic thin film transistors(OTFTs) on plastic substrate. We designed the W/L of OTFT to be 15, considering EPD's transient characteristics. The OTFTs employed bottom contact structure and used Al for gate electrode, the cross-linked polyvinylphenol for gate insulator, pentacene for active layer. The plastic substrate was coated by PVP barrier layer in order to remove the islands which were formed after pre-shrinkage process and caused the electrical short between bottom scan and top data metal lines. Pentacene active layer was confined within the gate electrodes so that the off current was controlled and reduced by gate electrodes. Especially, PVA/Acryl double layers were inserted between EPD panel and OTFT-backplane in order to protect OTFT-backplane from the damages created by lamination process of EPD panel on the backplane and also accommodate pixel electrodes through via holes. From the OTFT-backplane the mobility was $0.21cm^2/V.s$, Ion/Ioff current ratio $10^5$. The OTFT-EPD panel worked successfully and demonstrated to display some patterns.

Characteristic Analysis of Poly(4-Vinyl Phenol) Based Organic Memory Device Using CdSe/ZnS Core/Shell Qunatum Dots

  • Kim, Jin-U;Kim, Yeong-Chan;Eom, Se-Won;No, Yong-Han
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.289.1-289.1
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    • 2014
  • In this study, we made a organic thin film device in MIS(Metal-Insulator-Semiconductor) structure by using PVP (Poly vinyl phenol) as a insulating layer, and CdSe/ZnS nano particles which have a core/shell structure inside. We dissolved PVP and PMF in PGMEA, organic solvent, then formed a thin film through a spin coating. After that, it was cross-linked by annealing for 1 hour in a vacuum oven at $185^{\circ}C$. We operated FTIR measurement to check this, and discovered the amount of absorption reduced in the wave-length region near 3400 cm-1, so could observe decrease of -OH. Boonton7200 was used to measure a C-V relationship to confirm a properties of the nano particles, and as a result, the width of the memory window increased when device including nano particles. Additionally, we used HP4145B in order to make sure the electrical characteristics of the organic thin film device and analyzed a conduction mechanism of the device by measuring I-V relationship. When the voltage was low, FNT occurred chiefly, but as the voltage increased, Schottky Emission occurred mainly. We synthesized CdSe/ZnS and to confirm this, took a picture of Si substrate including nano particles with SEM. Spherical quantum dots were properly made. Due to this study, we realized there is high possibility of application of next generation memory device using organic thin film device and nano particles, and we expect more researches about this issue would be done.

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Study on the Low-temperature process of zinc oxide thin-film transistors with $SiN_x$/Polymer bilayer gate dielectrics ($SiN_x$/고분자 이중층 게이트 유전체를 가진 Zinc 산화물 박막 트랜지스터의 저온 공정에 관한 연구)

  • Lee, Ho-Won;Yang, Jin-Woo;Hyung, Gun-Woo;Park, Jae-Hoon;Koo, Ja-Ryong;Cho, Eou-Sik;Kwon, Sang-Jik;Kim, Woo-Young;Kim, Young-Kwan
    • Journal of the Korean Applied Science and Technology
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    • v.27 no.2
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    • pp.137-143
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    • 2010
  • Oxide semiconductors Thin-film transistors are an exemplified one owing to its excellent ambient stability and optical transparency. In particular zinc oxide (ZnO) has been reported because It has stability in air, a high electron mobility, transparency and low light sensitivity, compared to any other materials. For this reasons, ZnO TFTs have been studied actively. Furthermore, we expected that would be satisfy the demands of flexible display in new generation. In order to do that, ZnO TFTs must be fabricated that flexible substrate can sustain operating temperature. So, In this paper we have studied low-temperature process of zinc oxide(ZnO) thin-film transistors (TFTs) based on silicon nitride ($SiN_x$)/cross-linked poly-vinylphenol (C-PVP) as gate dielectric. TFTs based on oxide fabricated by Low-temperature process were similar to electrical characteristics in comparison to conventional TFTs. These results were in comparison to device with $SiN_x$/low-temperature C-PVP or $SiN_x$/conventional C-PVP. The ZnO TFTs fabricated by low-temperature process exhibited a field-effect mobility of $0.205\;cm^2/Vs$, a thresholdvoltage of 13.56 V and an on/off ratio of $5.73{\times}10^6$. As a result, We applied experimental for flexible PET substrate and showed that can be used to ZnO TFTs for flexible application.

Fabrication of Pixel Array using Pentacene TFT and Organic LED (펜타센 TFT와 유기 LED로 구성된 픽셀 어레이 제작)

  • Choe Ki Beom;Ryu Gi Seong;Jung Hyun;Song Chung Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.13-18
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    • 2005
  • In this paper, we fabricated a pixel array in which each pixel was consisted of Organic Thin Film Transistor (OTFT) serially connected with Organic Light Emitting Diode (OLED) on Poly-ethylene-terephthalate (PET) substrate and the number of pixels was 64 x 64. As a gate insulator of OTFT, the thermally cross-linked PVP was used and the organic semiconductor, Pentacene, is deposited for an active layer of OTFT considering the compatibility with PET substrate. The mobility of OTFT is $1.0\;cm^2/V{\cdot}sec$ as a discrete device, but it was reduced to $0.1\~0.2\;cm^2/V{\codt}sec$ in the array. We analyzed the operation of the array and confirmed the current driving ability of OTFTs for the OLEDs.

Performances of $C_{60}$ based n-type Organic Thin Film Transistor with A Doped Interlayer Using Bathophenanthroline (Bathophenanthroline를 interlayer로 적용한 $C_{60}$ 기반의 n형 유기박막트랜지스터의 성능)

  • Kim, Jeong-Su;Son, Hee-Geon;Yi, Moon-Suk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.8
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    • pp.7-12
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    • 2010
  • In this paper, $C_{60}$ based Organic thin film transistor OTFTs) have been fabricated using BPhen(Bathophenanthroline) and BPhen doped with Cs interlayers between $C_{60}$ active layer and Al electrodes to improve the electrical performance. The addition of the BPhen layer resulted in enhanced performances by reducing surface roughness between organic-metal interface. And the contact resistance was reduced by using the BPhen doped with Cs interlayer with co-evaporation method. These performances suggests that the $C_{60}$ based OTFT with BPhen doped with Cs interlayer is a promising application in the fabrication of n-type organic transistors.