• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.130-133
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• 2010

This paper presents a study of the influence of variation of counter doping thickness on short channel effect in symmetric double-gate (DG) nano MOSFETs. Short channel effects are estimated from the computed values of current-voltage (I-V) characteristics. Two dimensional Quantum transport equations and Poisson equations are used to compute DG MOSFET characteristics. We found that the transconductance ($g_m$) and the drain conductance ($g_d$) increase with an increase in p-type counter-doping thickness ($T_c$). Very high value of transconductance ($g_m=38\;mS/{\mu}m$) is observed at 2.2 nm channel thickness. We have established that the threshold voltage of DG MOSFETs can be tuned by selecting the thickness of counter-doping in such device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.11-20
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• 2008

The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.210-215
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• 1994

In the CMOS device, Counter doping is needed to adjust threshold voltage because of the difference between n-MOSFET and p-MOSFET well doping concentration when n+ polysilicon gate is used. Therefore buried channel is formed in the p-channel MOSFET degrading properties. So well doping concentration and doping condition should be considered in fabrication process and device design. Here we are to extract the initial process condition using simulation and fabricate p-MOSFET device and then compare the subthreshold characteristics of simulated and fabricated device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.3
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• pp.240-250
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• 2010

Double Gate MOSFETs (DG MOSFETs) with doping in one or two thin layers of an otherwise intrinsic channel are simulated to obtain the transport characteristics, threshold voltage and leakage current. Two different device structures- one with doping on two layers near the top and bottom oxide layers and another with doping on a single layer at the centre- are simulated and the variation of device parameters with a change in doping concentration and doping layer thickness is studied. It is observed that an n-doped layer in the channel reduces the threshold voltage and increases the drive current, when compared with a device of undoped channel. The reduction in the threshold voltage and increase in the drain current are found to increase with the thickness and the level of doping of the layer. The leakage current is larger than that of an undoped channel, but less than that of a uniformly doped channel. For a channel with p-doped layer, the threshold voltage increases with the level of doping and the thickness of the layer, accompanied with a reduction in drain current. The devices with doped middle layers and doped gate layers show almost identical behavior, apart from the slight difference in the drive current. The doping level and the thickness of the layers can be used as a tool to adjust the threshold voltage of the device indicating the possibility of easy fabrication of ICs having FETs of different threshold voltages, and the rest of the channel, being intrinsic having high mobility, serves to maintain high drive current in comparison with a fully doped channel.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.12
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• pp.53-58
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• 1998

A buried channel poly-Si TFT (BCTFT) for application of high performance integrated circuits has been proposed and fabricated. BCTFT has unique features, such as the moderately-doped buried channel and counter-doped body region for conductivity modulation, and the fourth terminal entitled back bias for preventing kink effect. The n-type and p-type BCTFT exhibits superior performance to conventional poly-Si TFT in ON-current and field effect mobility due to moderate doping at the buried channel. The OFF-state leakage current is not increased because the carrier drift is suppressed by the p-n junction depletion between the moderately-doped buried channel and the counter-doped body region.

• Bulletin of the Korean Chemical Society
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• v.32 no.5
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• pp.1635-1639
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• 2011

An efficient and novel positive charge-doping on the sidewalls of multi-walled carbon nanotubes has been achieved in the presence of tetrahydrofuran as a dopant and Lewis acidic ionic liquids, [bmim]$Sb_nF_{5n+1}$ (n ${\geq}$ 2; bmim = 1-butyl-3-methylimidazolium), as an activator, leaving air-stable derivatives having positively charged sidewalls and the counter anions, [MWCNT$^{y+}$][SbF$_6^-$]$_y$ (MWCNT = multi-walled carbon nanotube). The derivatization took place very fast in one-pot and under mild reaction conditions. The ionic structure enabled a tunable dissolution of the derivatives in various solvents through anion exchange.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.111-111
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• 2007

Further scaling the semiconductor devices down to low dozens of nanometer needs the extremely shallow depth in junction and the intentional counter-doping in the silicon gate. Conventional ion beam ion implantation has some disadvantages and limitations for the future applications. In order to solve them, therefore, plasma source ion implantation technique has been considered as a promising new method for the high throughputs at low energy and the fabrication of the ultra-shallow junctions. In this paper, we study about the effects of DC bias and base pressure as a process parameter. The diluted mixture gas (5% $PH_3/H_2$) was used as a precursor source and chamber is used for vacuum pressure conditions. After ion doping into the Si wafer(100), the samples were annealed via rapid thermal annealing, of which annealed temperature ranges above the $950^{\circ}C$. The junction depth, calculated at dose level of $1{\times}10^{18}/cm^3$, was measured by secondary ion mass spectroscopy(SIMS) and sheet resistance by contact and non-contact mode. Surface morphology of samples was analyzed by scanning electron microscopy. As a result, we could accomplish the process conditions better than in advance.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.6
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• pp.574-579
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• 1999

A counter-flow type horizontal reactor of metal organic chemical vapor deposition was designed with the Reynolds and the Rayleigh numbers of Re = 4.5 and Ra = 215.8, respectively. The GaN thin films were grown and characterized by Hall measurement, double crystal X-ray diffraction analysis and photoluminescence measurement. The Si and Mg were also used for doping of GaN films. The dislocation density of $2.6{\times}10^8/\textrm {cm}^2$ was included in GaN films representing the geometrical lattice mismatch between sapphire substrates and GaN films. The Si doped n-GaN films provide the electron carrier density and mobility in the regions of $10^{17}~10^{18}/\textrm{cm}^3$ and 200~400 $\textrm{cm}^2$/V .sec, respectively. Mg doped p-GaN films were post-annealed and activated with the hole carrier density of $8{\times}10^{17}/{\textrm}{cm}^3$.

• Journal of the Korean Electrochemical Society
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• v.13 no.3
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• pp.211-216
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• 2010

Boron trifluoride lithium methacrylate ($BF_3$LiMA)-based gel polymer electrolytes (GPEs) were synthesized with various $BF_3$LiMA concentration to elucidate the effect on ionic conductivity and electrochemical stability by a AC impedance and linear sweep voltammetry (LSV). As a result, the highest ionic conductivity reached $5.3{\times}10^{-4}Scm^{-1}$ at $25^{\circ}C$ was obtained for 4 wt% of $BF_3$LiMA. Furthermore, high electrochemical stability up to 4.3 V of the $BF_3$LiMA-based GPE was observed in LSV measurement since the counter anion was immobilized in this self-doped system. On the other hand, it was assumed that there was a rapid decomposition of electrolytes on a lithium metal electrode which results in a high solid electrolyte interface (SEI) resistance. However, a high stability toward graphite or lithium cobalt oxide (LCO) electrode thereby a low SEI resistance was observed from the AC impedance measurement as a function of storage time at $25^{\circ}C$. Consequently, the high ionic conductivity, good electrochemical stability and the good interfacial compatibility with graphite and LCO were achieved in $BF_3$LiMA-based GPE.

• Journal of the Korean Electrochemical Society
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• v.14 no.4
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• pp.208-213
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• 2011

Solid polymer electrolytes using $BF_3LiMA$ as monomer were synthesized by usual one step radical polymerization in THF solvent. The effect of $BF_3LiMA$ concentration on ionic conductivity and electrochemical stability was investigated by AC impedance measurement and linear sweep voltammetry. As a result, the highest ionic conductivity reached $7.71{\times}10^{-6}S\;cm^{-1}$ at $25^{\circ}C$ was obtained in 12.9 wt% of $BF_3LiMA$ content. Further increase or decrease of $BF_3LiMA$ content result to decrease the ionic conductivity due to the brittle matrix properties in former case and the insufficient number of charge carrier in the latter case. Furthermore, since the counter-anion was immobilized in the self-doped solid polymer electrolytes, high electrochemical stability up to 6.0 V was observed even in $60^{\circ}C$.