• Journal of Industrial Technology
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• v.30 no.A
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• pp.83-88
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• 2010

Recently, the LED lighting is widely used to illumination purpose due to its high luminous efficiency and the long life time. However, the light power and lifetime is reduced by junction temperature increment of LED. So it is important to measure the junction temperature accurately. In this paper, we proposed a new design and implementation method of high power LED junction temperature measurement circuit. The proposed circuit has two current sources which are a driving current source and a measurement is verified by experiment, and the result shows that the proposed circuit is appropriate to practical use.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.1
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• pp.107-114
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• 1994

Hardware implementation of the on-chip learning artificial neural networks is important for real-time processing. A pRAM model is based on probabilistic firing of a biological neuron and can be implemented in the VLSI circuit with learning capability. We derive a backpropagation learning algorithm for the pRAM networks and present its circuit implementation with stochastic computation. The simulation results confirm the good convergence of the learning algorithm for the pRAM networks.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.2
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• pp.44-50
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• 1993

In this paper, we will present an array processor for implementation of digital neural networks. Back-propagation model can be formulated as a consecutive matrix-vector multiplication problem with some prespecified thresholding operation. This operation procedure is suited for the design of an array processor, because it can be recursively and repeatedly executed. Systolic array circuit architecture with Residue Number System is suggested to realize the efficient arithmetic circuit for matrix-vector multiplication and compute sigmoid function. The proposed design method would expect to adopt for the application field of neural networks, because it can be realized to currently developed VLSI technology.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.11
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• pp.66-73
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• 1993

This paper presents an analog circuit implementation and experimental resuls of the Hopfield type neural network. The proposed architecture enables the reconfiguration betwewn feedback and feedforward networks and employs new circuit designs for the weight supply and storage, analog multilier, nd current-voltage converter, in order to achieve area efficiency as well as function al versatility. The layout design of the eight-neuron neural network is tested as an associative memory to verify its applicability to real world.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.6
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• pp.879-885
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• 1990

The geometrical algorithm for generating a 3-phase SPWM signal for VVVF (Variable Voltage, Variable Frequency) inverter drives is proposed. In this techniques, it is suitable for micro-processor based implementation since the pulsewiths are computable in real time from simple analytic expressions. System hardware consists of the inverter circuit and the 3-phase SPWM signal generating circuit. The inverter circuit is a 3-phase SPWM signal generating circuit is single board micro-processor consisting of Z-80A CPU, EPROMXI, CTC, PIO. The method of controlling VVVF at the inverter output is discussed here.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.333-336
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• 2001

This paper describes the design and implementation results of 40, 32, 24 and 16kbps ADPCM encoder and decoder circuit, based on the protocol CCITT G.726. We verified the ADPCM algorithm using C language and designed the RTL circuit with Verilog HDL. The circuit has been simulated by Verilog-XL, synthesized by Design Compiler and verified using Xilinx FPGA. Since the synthesized circuit includes a small number of gates, it is expected to be used as a core module in the digital voice and image processing SOC.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.312-316
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• 1987

A simple hybrid circuit to control the two-phase AC motor of the nut-runners which employ the tightening torque control system is described in this paper. The circuit has emphasis on the low-cost implementation. The circuit constitutes of the V/F converter using a timer IC, the pulse width modulator using the fastening torque signal and the two-phase logic sequencer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.09a
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• pp.82-88
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• 2001

Manufactured easy elevator can drives from the first floor to fifth floor as sequence control circuit in cause opening than existing equipment of experiment and practice, the structure of in the first implementation process are hand-worked control component with push-button, L/S and relay, it is structured a lamp to express that the door open and moving of cage by mechanical action of For/Rev motor-braker of which load. The second structure of implement process to control from the first floor to the fifth floor with the PLC elevator program can control by the sensor of hand-operated function of L/Sl~L/S5 in time that the S/Wl~S/W5 of PLC control panel operates to the For/Rev. The function of two kind process that an elevator is driven by PLC program and the sequence control relay circuit is a mechanical relay sequence control field and it is equipment apparatus of it to get appropriately the technology of For/Rev in that mechanical operating cause of a load using the PLC program. Also the wring circuit using a plug, dissembly. the circuit and the principle of component, and PLC program with the function test can be used the implementation field to the total technology theory about FA.

• The Journal of the Korea institute of electronic communication sciences
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• v.17 no.2
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• pp.351-356
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• 2022

The parity function can be implemented with XOR (exclusive-OR) and XNOR (exclusive NOR) circuit. In this paper we propose a high performance XOR-XNOR circuit. The proposed circuitreduced the internal load capacitance on critical path and implemented with 8 transistors. The circuit produces a perfect output signals for all input combinations. Compared with the previous circuits, the proposed circuit presents the improved characteristics in average propagation delay time, power dissipation, power-delay product (PDP), and energy-delay-product (EDP). The proposed circuits are implemented with standard CMOS 0.18um technology. Computer simulations using SPICE show that the proposed circuit realizes the expected logic functions and achieves a reasonable performance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.571-574
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• 2012

optical wavelength analyzer design and implementation of this study is about. For experiments, the input light in the infrared, ultraviolet, visible as a light source was used. I-V Converting circuit configured as a photodiode. I-V Converting circuit voltage is measured. Measured voltage can be determined for a wavelength in size.