• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1757-1762
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• 2003

With distribution industrial control system, the use of low cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with PLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS (Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.473-482
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• 2017

Hand gesture recognition is regarded as new Human Computer Interaction (HCI) technologies for the next generation of mobile devices. Previous hand gesture implementation requires a large memory and computation power for hand segmentation, which fails to give real-time interaction with mobile devices to users. Therefore, in this paper, we presents a low latency and memory-efficient hand segmentation architecture for natural hand gesture recognition. To obtain both high memory-efficiency and low latency, we propose a streaming hand contour tracing unit and a fast contour filling unit. As a result, it achieves 7.14 ms latency with only 34.8 KB on-chip memory, which are 1.65 times less latency and 1.68 times less on-chip memory, respectively, compare to the best-in-class.

• Journal of Sensor Science and Technology
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• v.14 no.1
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• pp.28-32
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• 2005

In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.465-467
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• 2004

This paper deals with the design and analysis of automatic virus infection machine, which can be used in blood testing at veterinary hospital. It consists of the mechanical positioning parts and electrical control parts. Two of driving motor and ball screws are used to move the liquid container into the test position and mix the blood on litmus paper. In addition, a thermal controller is installed to keep the container temperature on constant level. The user interface using with a LCD and some keys are supplied with a 8-bit single chip controller. All of the designs issue related with the mechanism and controllers are discussed in detail. Finally the proposed machine is tested in real experiment with the formal processing to judge the virus infection, and also the usefulness of designed algorithm is verified through the experiments.

• Vacuum Magazine
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• v.4 no.3
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• pp.16-20
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• 2017

Graphene has emerged as a promising material for optoelectronic applications including as ultrafast and broadband photodetector, optical modulator, and nonlinear photonic devices. Graphene based devices have shown the feasibility of ultrafast signal processing for required for photonic integrated circuits. However, on-chip monolithic nanoscale light source has remained challenges. Graphene's high current density, thermal stability, low heat capacity and non-equilibrium of electron and lattice temperature properties suggest that graphene as promising thermal light source. Early efforts showed infrared thermal radiation from substrate supported graphene device, with temperature limited due to significant cooling to substrate. The recent demonstration of bright visible light emission from suspended graphene achieve temperature up to ~3000 K and increase efficiency by reducing the heat dissipation and electron scattering. The world's thinnest graphene light source provides a promising path for on-chip light source for optical communication and next-generation display module.

• Proceedings of the KOSOMBE Conference
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• v.1997 no.05
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• pp.342-344
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• 1997

Owing to technical advances in very large-scale integrated circuits (VLSI), high-speed digital signal processing (DSP) chips become fast enough to allow for real-time implementation of hearing aid algorithms in units small enough to be wearable. In this paper, we present a digital hearing aid processor (DHAP) chip built around a general-purpose 16-bit DSP core. The designed DHAP performs a nonlinear loudness correction of 8 octave frequency bands based on audiometric measurements. By employing a programmable DSP, the DHAP provides all the flexibility needed to implement audiological algorithms. In addition, the has a low power feature and $5.410\times5.720mm^2$ dimensions that fit for wearable devices.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.201-203
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• 2005

The best method to study language is to talking with a native speaker. A voice recognition technology can be used to develope a language study machine. SD(Speaker dependant) and SI(speaker independant) voice recognition method is used for the language study machine. MP3 Player. FM Radio. Alarm clock functions are added to enhance the value of the product. The machine is designed with a DSP(Digital Signal Processing) chip for voice recognition. MP3 encoder/decoder chip. FM tumer and SD flash memory card. This paper deals with the application of SD ad SD voice recognition. flash memory file system. PC download function using USB ports, English conversation text function by the use of SD flash memory. LCD display control. MP3 encoding and decoding, etc. The study contents are saved in SD flash memory. This machine can be helpful from child to adult by changing the SD flash memory.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.2
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• pp.123-128
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• 2016

In this paper, an inversely tapered coupler with Bragg reflectors is reported for the first time. With appropriately positioned reflecting structures, our fiber-to-chip coupler can more efficiently transmit the light from fiber to a waveguide in a photonic integrated circuit (PIC). A numerical simulation evaluated the coupler's efficiency with the reflector. Optimized parameters that maximize the efficiency of the coupler are also investigated. Simulation results show that the reflector with appropriate parameters enhances efficiency by up to 7 dB. Likewise, Bragg metal reflectors implemented by the conventional metallization process can also improve efficiency. It is also shown that the proposed reflector enhances the coupling efficiency in a double-tip taper coupler.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.297-300
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• 2002

Application of electronic nose and PLD chip design was developed to be used in gas discrimination system for limited kinds of gas. An array of 4 metal oxide gas sensors with different selectivity patterns were used in order to measure gases. BP(Back Propagation) algorithm was designed and implemented on CPLD of two hundred thousand gate level chips by VHDL language for processing input signals from 4 kinds of gas sensors. This module successfully discriminated 4 kinds of gases and displayed the results on LCD and LED. The developed module could be used for various applications in the field of food process control and alcohol judgment.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.859-862
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• 2003

This paper proposes an emulation environment for SoC designs using small number of large gate-count FPGA's and a PC system. To overcome the pin limitation problem in partitioning the design when the design size overwhelms the FPGA gate count, we use bus splitter modules that replicate on-chip bus signals in one FPGA to arbitrary number of other FPGA's with minimal pin count. The proposed scheme is applied to the emulation of 2 million gate multimedia processing chip using two Xilinx Viretex-2 6000 FPGA devices in 6.6MHz operating frequency. An ARM core, memories, camera and LCD display are modeled in software using dual 2GHz Pentium-III processors. This scheme can be utilized for more than 2 FPGA's in the same ways as two FPGA case without losing emulation speed.