• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.39-42
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• 2002

Recently, CMP (chemical mechanical polishing) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, COO (cost of ownership) and COC (cost of consumables) were relatively increased because of expensive slurry. In this paper, we have studied the possibility of recycle of reused silica slurry in order to reduce the costs of CMP slurry. The post-CMP thickness and within-wafer non-uniformity(WIWNU) were measured as a function of different slurry composition. As a experimental result, the performance of reused slurry with annealed silica abrasive of 2 wt% contents was showed high removal rate and low non-uniformity. Therefore, we propose two-step CMP process as follows In the first-step CMP, we can polish the thick and rough film surface using remaked slurry, and then, in the second-step CMP, we can polish the thin film and fine pattern using original slurry. In summary, we can expect the saving of high costs of slurry.

• 한국전기전자재료학회논문지
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• 제16권9호
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• pp.759-764
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• 2003

Recently, CMP (chemical mechanical polishing) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, COO (cost of ownership) and COC (cost of consumables) were relatively increased because of expensive slurry. In this paper, we have studied the possibility of recycle of roused silica slurry in order to reduce the costs of CMP slurry. The post-CMP thickness and within-wafer non-uniformity (WIWNU) wore measured as a function of different slurry composition. As an experimental result, the performance of reused slurry with annealed silica abrasive of 2 wt％ contents was showed high removal rate and low non-uniformity. Therefore, we propose two-step CMP process as follows , In tile first-step CMP, we can polish the thick and rough film surface using remaked slurry, and then, in the second-step CMP, we can polish the thin film and fine pattern using original slurry. In summary, we can expect the saying of high costs of slurry.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.82-82
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• 2007

The chemical mechanical polishing (CMP) process has been widely used to obtain global planarization of multilevel interconnection process for ultra large scale. integrated circuit applications. Especially, the application of copper CMP has become an integral part of several semiconductor device and materials manufacturers. However, the low-k materials at 65nm and below device structures because of fragile property, requires low down-pressure mechanical polishing for maintaining the structural integrity of under layer during their fabrication. In this paper, we studied electrochemical mechanical polishing (ECMP) as a new planarization technology that uses electrolyte chemistry instead of abrasive slurry for copper CMP process. The current-voltage (I-V) curves were employed we investigated that how this chemical affect the process of voltage induced material removal in ECMP of Copper. This work was supported by grant No. (R01-2006-000-11275-0) from the Basic Research Program of the Korea Science.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.374-375
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• 2006

The purpose of this paper is to investigate the propriety of biodegradable polymer pad in spite of exchanging from existing polyurethane pad used in CMP(Chemical Mechanical Planarization). Poli 400 of G&P Technology for CMP and Ellipsometer of Rudolph AutoEL-III for measurement were used in this experiment. From this experiment, it is proven that the biodegradable polymer pad is sufficiently suitable in CMP process. Therefore, it is expected that, by using the biodegrable pad CMP manufacturing process, and will be decreased. Especially, wafer scratch can be decreased.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.651-652
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• 2005

Chemical mechanical polishing (CMP) has emerged as the planarization technique of choice in integrated circuit manufacturing. Especially, polishing pad is considered as one of the most important consumables because of its properties. Generally, conventional polishing pad has irregular pores and asperities. If conditioning process is except from whole polishing process, smoothing of asperities and pore glazing occur on the surface of the pad, so repeatability of polishing performances cannot be expected. In this paper, CMP pad with microstructure was made using micro-molding technology and repeatability of ILD(interlayer dielectric) CMP performances and was evaluated.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.119-120
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• 2008

ILD CMP process has been well accepted for the planarization of the dielectric oxide film and becomes a critical process in ULSI manufacturing due to the rapid shrinkage of the design rule for the device. In total manufacturing process steps for a device, the proportion of ILD CMP process has been gradually increased. Ever since ILD CMP has been introduced, the scratches have been a major defects on polished surfaces which cause the electrical shorts between vias or metal lines [1,2]. It was reported that micro-scratches are caused by large, irregularly shaped particles during CMP process. Therefore, most of the CMP users have used < 5 m POU filter to remove and reduce the scratch source from the slurry. However, the scratch has always been the biggest concern in ILD polishing whatever preventive actions are taken. Silica and ceria slurries are widely used for ILD CMP process. There are not much differences in generated scratches and their formation mechanism. In this study, the scratches were investigated as a function of polishing conditions with possible explanation on formation mechanism in ILD CMP.

• 한국전기전자재료학회논문지
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• 제18권4호
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• pp.297-302
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• 2005

Chemical mechanical polishing(CMP) performances can be optimized by several process parameters such as equipment and consumables (pad, backing film and slurry). Pad properties are important in determining removal rate and planarization ability of a CMP process. It is investigated the performance of oxide CMP process using commercial silica slurry after the pad conditioning temperature was varied. Conditioning process with the high temperature made the slurry be unrestricted to flow and be hold, which made the removal rate of oxide film increase. The pad became softer and flexible as the conditioning temperature increases. Then the softer pad provided the better surface planarity of oxide film without defect.

• 한국정밀공학회지
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• 제21권7호
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• pp.22-29
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• 2004

As a result of high integration of semiconductor device, the global planarization of multi-layer structures is necessary. So the chemical mechanical polishing(CMP) is widely applied to manufacturing the dielectric layer and metal line in the semiconductor device. CMP process is under influence of polisher, pad, slurry, and process itself, etc. In comparison with the general CMP which uses the slurry including abrasives, fixed abrasive pad takes advantage of planarity, resulting from decreasing pattern selectivity and defects such as dishing & erosion due to the reduction of abrasive concentration especially. This paper introduces the manufacturing technique of fixed abrasive pad using hydrophilic polymers with swelling characteristic in water and explains the self-conditioning phenomenon. And the tungsten CMP using fixed abrasive pad achieved the good conclusion in terms of the removal rate, non-uniformity, surface roughness, material selectivity, micro-scratch free contemporary with the pad life-time.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.376-377
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• 2006

Chemical Mechanical Planarization (CMP) has emerged as an enabling technology for the manufacturing of multi-level metal interconnects used in high-density Integrated Circuits (IC). Recently, multi-level structures have been also widely used m the MEMS device such as micro engines, pressure sensors, micromechanical fluid pumps, micro mirrors and micro lenses. Especially, among the thin films available in IC technologies, polysilicon has probably found the widest range of uses in silicon technology based MEMS. This paper presents the characteristic of polysilicon CMP for multi-level MEMS structures. Two-step CMP process verifies that is possible to decrease dishing amount with two type of slurries characteristics. This approach is attractive because two-step CMP process can be decreased dishing amount considerably more then just one CMP process.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2000년도 추계학술발표강연 및 논문개요집
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• pp.53-53
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• 2000