• Title/Summary/Keyword: carrier trapping

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The oxidation of silicon nitride layer (실리콘 질화막의 산화)

  • 정양희;이영선;박영걸
    • Electrical & Electronic Materials
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    • v.7 no.3
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    • pp.231-235
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    • 1994
  • The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

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Hot Electron Induced Device Degradation in Gate-All-Around SOI MOSFETs (Gate-All-Around SOI MOSFET의 소자열화)

  • 최낙종;유종근;박종태
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.10
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    • pp.32-38
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    • 2003
  • This works reports the measurement and analysis results on the hot electron induced device degradation in Gate-All-Around SOI MOSFET's, which were fabricated using commercially available SIMOX material. It is observed that the worst-case condition of the device degradation in nMOSFETs is $V_{GS}$ = $V_{TH}$ due to the higher impact ionization rate when the parasitic bipolar transistor action is activated. It is confirmed that the device degradation is caused by the interface state generation from the extracted degradation rate and the dynamic transconductance measurement. The drain current degradation with the stress gate voltages shows that the device degradation of pMOSFETs is dominantly governed by the trapping of hot electrons, which are generated in drain avalanche hot carrier phenomena.r phenomena.

Constant Voltage Stress (CVS) and Hot Carrier Injection (HCI) Degradations of Vertical Double-date InGaAs TFETs for Bio Sensor Applications (바이오 센서 적용을 위한 수직형 이중게이트 InGaAs TFET의 게이트 열화 현상 분석)

  • Baek, Ji-Min;Kim, Dae-Hyun
    • Journal of Sensor Science and Technology
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    • v.31 no.1
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    • pp.41-44
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    • 2022
  • In this study, we have fabricated and characterized vertical double-gate (DG) InGaAs tunnel field-effect-transistors (TFETs) with Al2O3/HfO2 = 1/5 nm bi-layer gate dielectric by employing a top-down approach. The device exhibited excellent characteristics including a minimum subthreshold swing of 60 mV/decade, a maximum transconductance of 141 µS/㎛, and an on/off current ratio of over 103 at 20℃. Although the TFETs were fabricated using a dry etch-based top-down approach, the values of DIBL and hysteresis were as low as 40 mV/V and below 10 mV, respectively. By evaluating the effects of constant voltage and hot carrier injection stress on the vertical DG InGaAs TFET, we have identified the dominant charge trapping mechanism in TFETs.

Hot-Carrier-Induced Degradation of Lateral DMOS Transistors under DC and AC Stress (DC 및 AC 스트레스에서 Lateral DMOS 트랜지스터의 소자열화)

  • Lee, In-Kyong;Yun, Se-Re-Na;Yu, Chong-Gun;Park, J.T.
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.2
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    • pp.13-18
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    • 2007
  • This paper presents the experimental findings on the different degradation mechanism which depends on the gate oxide thickness in lateral DMOS transistors. For thin oxide devices, the generation of interface states in the channel region and the trapped holes in the drift region is found to be the causes of the device degradation. For thick devices, the generation of interface states in the channel region is found to be the causes of the device degradation. We confirmed the different degradation mechanism using device simulation. From the comparison of device degradation under DC and AC stress, it is found that the device degradation is more significant under DC stress than one under AC stress. The device degradation under AC stress is more significant in high frequency. Therefore the hot carrier induced degradation should be more carefully considered in the design of RF LDMOS transistors and circuit design.

Effect of Oxidizing Agents on the Burning Characteristics of Smoke Rod of Pesticides Using Rice Chaff as a Combustible Carrier (왕겨를 가연성 담체로 하는 봉상 농약 훈연제의 연소성에 미치는 산화제의 영향)

  • Lim, He-Kyoung;Kim, Yong-Whan;Cho, Kwang-Yun;Yu, Ju-Hyun
    • Applied Biological Chemistry
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    • v.47 no.3
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    • pp.332-338
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    • 2004
  • An investigation in search of the best oxidizing agent for smoke generators using rice chaff as a combustible carrier was carried out. Smoke rods formulated with active ingredients (AIs) such as inorganic oxidizing agents, glue, and powdered rice chaff, showed constant and high burning rate and high smoking rate on 11 kinds of pesticides. Sodium chlorate was the most suitable oxidizing agent for smoke rod. Even though the sodium chlorate content of the formulation showing the highest smoking rate of AI was variable to pesticides, the smoking rate appeared to increase as the burning rate increased. Active ingredients in smoke generator using rice chaff as a combustible carrier were stable for 60 days when stored at $50^{\circ}C$. An apparatus designed for smoke trapping was useful to collect smoked active ingredients.

Degradation of High Performance Short Channel N-type Poly-Si TFT under the Electrical Bias Caused by Self-Heating

  • Choi, Sung-Hwan;Song, In-Hyuk;Shin, Hee-Sun;Park, Sang-Geun;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1301-1304
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    • 2007
  • We have investigated degradation of short channel n-type poly-Si TFTs with LDD under high gate and drain voltage stress due to self-heating. We have found that the threshold voltage of short channel TFT is shifted to negative direction on the selfheating stress, whereas the threshold voltage of long channel is moved to positive direction.

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Carrier ConDuction of Thin Film Transistors (박막 트랜지스터의 반송자 전도)

  • 마대영;김기원
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.6
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    • pp.51-55
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    • 1984
  • Band headings, at grain boundary and surface of polycrystalline thin semiconductor films, were assumed. thin film ransistor conduction theory which considered trapping at surface of semiconductor was proposed. CdSe Thin Film Transistors were fabricated. CdSe was thermal evaporated and SiO2 used as insulator was rf sputtered. Output characteristics which was calculated by conduction theory were compared with experimental results.

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Analysis and Degradation of leakage Current in submicron Device (미세소자에서 누설전류의 분석과 열화)

  • 배지철;이용재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1996.11a
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    • pp.113-116
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    • 1996
  • The drain current of the MOSFET in the off state(i.e., Id when Vgs=0V) is undesired but nevertheless important leakage current device parameter in many digital CMOS IC applications (including DRAMs, SRAMs, dynamic logic circuits, and portable systems). The standby power consumed by devices in the off state have added to the total power consumed by the IC, increasing heat dissipation problems in the chip. In this paper, hot-carrier-induced degra- dation and gate-induced-drain-leakage curr- ent under worse case in P-MOSFET\`s have been studied. First of all, the degradation of gate-induced- drain-leakage current due to electron/hole trapping and surface electric field in off state MOSFET\`s which has appeared as an additional constraint in scaling down p-MOSFET\`s. The GIDL current in p-MOSFET\`s was decreased by hot-electron stressing, because the trapped charge were decreased surface-electric-field. But the GIDL current in n-MOS77T\`s under worse case was increased.

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Degradation of Gate Induced Drain Leakage(GIDL) Current of p-MOSFET along to Analysis Condition (분석 조건에 따른 p-MOSFET의 게이트에 유기된 드레인 누설전류의 열화)

  • 배지철;이용재
    • Electrical & Electronic Materials
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    • v.10 no.1
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    • pp.26-32
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    • 1997
  • The gate induced drain leakage(GIDL) current under the stress of worse case in -MOSFET's with ultrathin gate oxides has been measured and characterized. The GIDL current was shown that P-MOSFET's of the thicker gate oxide is smaller than that of the thinner gate oxide. It was the results that the this cur-rent is decreased with the increamental stress time at the same devices.It is analyzed that the formation components of GIDL current are both energy band to band tunneling at high gate-drain voltage and energy band to defect tunneling at low drain-gate voltage. The degradations of GIDL current was analyzed the mechanism of major role in the hot carriers trapping in gate oxide by on-state stress.

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온도에 따른 $SiO_2$, $SiN_X$ 게이트 절연막 ITZO 산화물 반도체 트랜지스터 전기적 특성 연구

  • Kim, Sang-Seop;Go, Seon-Uk;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.243.2-243.2
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    • 2013
  • 본 실험에서 $SiO_2$, $SiN_x$ 게이트 절연막에 따른 ITZO 산화물 반도체 트랜지스터를 제작하여, 온도변화에 따라 전달 특성 변화를 측정하여 열에 대한 소자의 안정성을 비교, 분석하였다. 온도가 증가함에 따라 carrier가 증가하는 온도 의존성을 보이며, 이로 인해 Ioff가 증가하였다. multiple-trapping 모델을 적용하여, 이동도 증가와 문턱 전압이 감소를 확인하였다. 또한 M-N rule을 적용하여 $SiO_2$, $SiN_x$ 게이트 절연막을 가진 ITZO 산화물 박막 트랜지스터의 활성화 에너지를 추출하고, sub-threshold 지역에서 활성화 에너지의 변화량이 $SiO_2$, SiNX 각각 0.37 eV/V, 0.24 eV/V로 차이를 통해 $SiN_x$ 게이트 절연체를 가진 ITZO 산화물 반도체 트랜지스터의 이동도와 문턱 전압의 변화가 더 컸음을 확인하였다.

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