• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.1
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• pp.175-182
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• 2011

In this paper, we implemented a high-performence memory controller which can accommodate processing blocks(multiple masters) in SoC for video signal processing. The memory controller is arbitrated by the internal arbiter which receives request signals from masters and sends grant and data signals to masters. The designed memory controller consists of Master Selector, Mster Arbiter, Memory Signal Generator, Command Decoder, and memory Signal Generator. It was designed using VHDL, and verified using the memory model of SAMSING Inc. For FPGA synthesis and verification, Quartus II of ATERA Inc. was used. The target device is Cyclone II. For simulation, ModelSim of Cadence Inc was used. Since the designed H/W can be stably operated in 174.28MHz, it satisfies the specification of SDRAM technology.

• Physical Therapy Rehabilitation Science
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• v.4 no.1
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• pp.32-37
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• 2015

Objective: This study was conducted to test the effects of mobile texting and gaming on gait with obstructions under different illumination levels. Design: Cross-sectional study. Methods: Twelve healthy adults aged 20 to 36 years (mean 23.5 years) were tested under six different conditions. All participants used touchscreen smartphones. Testing conditions included: 1) Walking with an obstruction under a bright illumination level; 2) walking with an obstruction with a low level of illumination; 3) walking with an obstruction while texting under a bright illumination level; 4) walking with an obstruction while texting with a low level of illumination; 5) walking with an obstruction while gaming under a bright illumination level; and 6) walking with an obstruction while gaming with a low level of illumination. All participants were asked to text the Korean national anthem by their own phone and play Temple Run 2 using an iPhone 5. Gait variances were measured over a distance of 3 m, and the mean value after three trials was used. A gait analyzer was used to measure the data. Results: Compared to normal gait with obstruction, gait speed, step length, stride length, step time, stride time, cadence while texting and gaming showed significant differences (p<0.05). Differences between the illumination levels included gait speed, step length, stride length, and step time (p<0.05) with no significant differences in stride time and cadence. Conclusions: Dual-tasking using a smartphone under low levels of illumination lowers the quality of gait with obstructions.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.69-78
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• 2007

A Frequency synthesizer for T-DMB and mobile-DTV applications was designed using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors were chosen for VCO core to reduce phase noise. The VCO range is 920MHz-2100MHz using switchable inductors, capacitors and varactors. Varactor biases that improve varactor acitance characteristics were minimized as two, and $K_{VCO}$(VCO gain) value was aintained by switchable varactor. Additionally, VCO was designed that VCO gain and the interval of VCO gain were maintained using VCO gain compensation logic. VCO, PFD, CP and LF were verified by Cadence Spectre, and divider was simulated using Matlab Simulink, ModelSim and HSPICE. VCO consumes 10mW power, and is 56.3% tuning range. VCO phase noise is -127dBc/Hz at 1MHz offset for 1.58GHz output frequency. Total power consumption of the frequency synthesizer is 18mW, and lock time is about $140{\mu}s$.

• Physical Therapy Korea
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• v.23 no.3
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• pp.1-10
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• 2016

Background: Gait problems appear in most stroke patients. Commonly, stroke patients show the typical abnormal gait patterns, such as circumduction, genu recurvatum, and spastic paretic stiff-legged gait. An inclined treadmill gait exercise is good for gait problems of stroke patients. In addition, the backward walking training has been recommended in order to improve the component of the movement for the forward walking. Objects: The purpose of this study to investigated the effects of backward walking with inclined treadmill training on the gait in chronic stroke patients. Methods: A total of 30 volunteers were randomly allocated to two groups that walked on an inclined treadmill: the experimental group ($n_1=15$), which walked backward, and the control group ($n_2=15$), which walked forward. To measure the improvement of the patients' gait, a Figure of Eight Walking Test (F8W), Four Square Step Test (FSST), and Functional Gait Assessment (FGA) were performed. We also measured spatio-temporal gait variables, including gait speed, cadence, stride length, and single limb support using a three-axial wireless accelerometer. The measurements were taken before and after the experiment. The Wilcoxon signed-rank test was used to compare both groups before and after the interventions. The Mann-Whitney U test was used for the comparisons after the interventions. The statistical significance was set at ${\alpha}=.05$. Results: Before and after experiment, all dependent variables were significantly different between the two groups (p<.05). As compared to the control group, the experimental group showed more significant improvements in F8W, FSST, speed, cadence, stride length, and single limb support (p<.05); however, FGA in this group was not significantly different from the control (p>.05). Conclusion: Our results suggest that backward walking on an inclined treadmill is more effective for improving the gait of stroke patients than forward walking.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.447-457
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• 2004

This paper proposes a RSA crypto-processor for embedded systems. The architecture of the RSA crypto-processor should be used relying on Big Montgomery algorithm, and is supported by configurable bit size. The RSA crypto-processor includes a RSA control signal generator, an optimal Big Montgomery processor(adder, multiplier). We use diverse arithmetic unit (adder, multiplier) algorithm. After we compared the various results, we selected the optimal arithmetic unit which can be connected with ARM core-processor. The RSA crypto-processor was implemented with Verilog HDL with top-down methodology, and it was verified by C language and Cadence Verilog-XL. The verified models were synthesized with a Hynix 0.25${\mu}{\textrm}{m}$, CMOS standard cell library while using Synopsys Design Compiler. The RSA crypto-processor can operate at a clock speed of 51 MHz in this worst case conditions of 2.7V, 10$0^{\circ}C$ and has about 36,639 gates.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.60-67
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• 2010

We designed Average Current Control PFC IC which has make the average value of boost inductor current became the shape of sine wave. Designed IC has fixed frequency of 75kHz to meet EMI standard requirement. And also RC compensation loop has been designed into the error amp and the current amp, in order that it has wide bandwidth for high speed control. And we use the oscillator which generates by square wave and triangle wave, and add to UVLO, OVP, OCP, TSD which is in order to operate stability. We simulated by using Spectre of Cadence to verify the unity power factor function and various protection circuits and fabricated in a $1{\mu}m$ High Voltage(20V) CMOS process.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.73-78
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• 2011

A frequency synthesizer for DAB applications is designed using $0.18{\mu}m$ CMOS process with 1.8V supply. NP-core type is chosen for VCO core to improve low power characteristic and symmetric characteristic of output waveform. VCO range is 1302.34 MHz - 1949.51 MHz using switchable capacitor bank and varactor bank. Varactor biases that improve varactor capacitance characteristics were minimized as two, $K_{vco}$(VCO gain) is maintained using technique of varactor bank switching. Intervals of $K_{vco}$ are maintained adding VCO frequency compensation logic. Each block of VCO and frequency synthesizer designed $0.18{\mu}m$ CMOS process with 1.8V supply is verified by Cadence Spectre, measured VCO consumes 9mA current, and is 39.8% tuning range, total power consumption of the frequency synthesizer is 18mW.

• Journal of IKEEE
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• v.14 no.4
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• pp.257-262
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• 2010

We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

• Physical Therapy Rehabilitation Science
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• v.7 no.1
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• pp.23-28
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• 2018

Objective: The purpose of this study was to investigate the impact of wearing various types of shoes on gait ability in stroke survivors and in order to gain information in regards to shoes that could possibly replace ankle orthosis. Design: Cross-sectional study. Methods: Eight hemiplegic survivors diagnosed with stroke participated in the study. Gait was analyzed using the GAITRite Electronic Walkway (CIR System Inc., USA) when subjects walked with no showed, walked with non-ankle-covered shoes, and walked with ankle-covered shoes. This study collected gait variables, including velocity, cadence, step length, stride length, single support time, and double support time, respectively. Results: In the comparison of walking with no shoes, non-ankle-covered shoes, and ankle-covered shoes, there were significant differences in gait velocity, step length, stride length, and the less affected side single support time (p<0.05). However, there were no significant differences in cadence, affected side single support time, and double support time. Conclusions: Ankle-covered shoes had a positive impact on the gait of stroke survivors. However, it is necessary to conduct more studies comparing various types of shoes with ankle orthoses.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.11
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• pp.1283-1290
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• 2014

This study was conducted to apply microcurrents of $500{\mu}A$ effective for ATP generation to leg muscles to which delayed onset muscle soreness (DOMS) had been induced in order to examine whether the microcurrent stimulation was effective for gait improvement. Forty subjects were randomly assigned to an experimental group of 20 subjects and a placebo group of 20 subjects. Microcurrents were applied immediately after inducing DOMS and 24 hours and 48 hours thereafter and changes in the center of pressure (COP), cadence, and affected stance phases were measured. According to the results of the measurement, changes in the COP, cadence, and affected stance phases at 48 hours after the induction of DOMS were statistically significant compared to the values before the induction. The COP of the experimental group became statistically significantly lower and the ratio of affected stance phases of the experimental group became statistically significantly higher compared to the placebo group at 48 hours after the induction of DOMS. Therefore, $500{\mu}A$ microcurrents showed effects for gait improvement by promoting the recovery and healing of damaged muscles.