• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.6
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• pp.16-24
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• 2009

In this paper, DC-DC buck converter with on-chip filter inductor and capacitor is presented. By operating at high switching frequency of 50MHz with stacked interleaved topology, we reduced inductor and capacitor sizes compared to previously published DC-DC buck converters. The proposed circuit is designed in a standard $0.5{\mu}m$ CMOS process, and chip area is $9mm^2$. This circuit operated at the input voltage of $3{\sim}5V$ range, the maximum load current of 250mA, and the maximum efficiency of 71%.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.427-430
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• 2001

Computers and automated manufacturing processes in industry are very susceptible to voltage sags and surges. The need for greater power reliability makes the end-users to use the uninterruptible power supply and other electronic power conditioning means to maintain the stable voltage. In this paper, a single-phase buck ac-ac converter for Custom Power Applications is presented. The presented converter uses IGBT's as switching module and maintains the stable voltage through PWM technology in spite of the input voltage sags and load rejections. In this paper, the operation characteristics of the power converter at steady state are illustrated using PSPICE simulations.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.31-34
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• 2018

This paper presents a low-power buck-boost converter for multi-input energy harvesting systems. The designed circuit combines the energy harvested from three input channels in real time and stores it in a storage capacitor. The structure of the buck-boost converter is simplified by using one external inductor and applying time division technique using an arbiter. In addition, to improve the efficiency of the system, the controller circuits of the converter are designed so that current consumption is minimized. The proposed circuit is designed with $0.35{\mu}m$ CMOS process. Simulation results show that the designed circuit consumes up to 490nA of current when all three input channels are active, and the maximum power efficiency is 92%. The chip area of the designed circuit is $1310{\mu}m{\times}1100{\mu}m$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.11B
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• pp.1667-1675
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• 2010

This paper presents a high efficiency DC-DC buck converter for mobile device. The circuit employes simplified compensation circuit for its portability and for high efficiency at stand-by mode. This device operates at PFM mode when it enters stand-by mode(light load). In order to place the compensation circuit on chip, the capacitor multiplier method is employed, such that it can minimize the compensation block size of the error amplifier down to 30%. The measurement results show that the buck converter provides a peak efficiency of 93% on PWM mode, and 92.3% on PFM mode. The converter has been fabricated with a $0.35{\mu}m$ CMOS technology. The input voltage of the buck converter ranges from 2.5V to 3.3V and it generates the output of 3.3V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.7A
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• pp.568-573
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• 2009

This paper presents a step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in O.13um CMOS standard process. In an effort to decrease system volume, this paper proposes the on chip compensation circuit using capacitor multiplier method. Capacitor multiplier method can minimize error amplifier's compensation capacitor size by 10%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87.2% for the output voltage of 1.2V (input voltage : 3.3V), maximum load current 500mA, and 25mA output ripple current. This voltage mode controled buck converter has 1MHz switching frequency.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.10a
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• pp.663-664
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• 2012

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.24-31
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• 2008

Power converters are becoming an essential block in modem mobile multimedia application. This paper presents a high performance DC-DC buck converter for mobile applications. Controller of DC-DC buck converter is designed by current-mode control method. An current-mode DC-DC converter is implemented in a standard $0.18{\mu}m$ CMOS process, and the overall die size was $1.2mm^2$. The peak efficiency was 86 % with a switching frequency of $1\sim1.5MHz$ and a maximum load current of 400mA.

• Journal of IKEEE
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• v.15 no.2
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• pp.134-142
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• 2011

This paper describes a tripple-mode high-efficiency DC-DC buck converter. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(100mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~100mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 96.4% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is 1.15mm ${\times}$ 1.10mm including pads.

• Journal of IKEEE
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• v.13 no.2
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• pp.208-215
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• 2009

The high efficiency power management IC(PMIC) with DT-CMOS(Dynamic Threshold voltage MOSFET) switching device for portable application is proposed in this paper. Because portable applications need high output voltages and low output voltage, Boost converter and Buck converter are embedded in One-chip. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. Boost converter and Buck converter, are based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 92.1% and 95%, respectively, at 100mA output current. And Step-down DC-DC converter in stand-by mode below 1mA is designed with LDO in order to achive high efficiency.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.398-401
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• 2011

This paper presents a high-efficiency CMOS PWM DC-DC buck converter. It generates a constant output voltage(1-2.8V), from an input voltage(3.4-3.9V). Inductor-based type is chosen and inductor current is controlled with PWM operation. The designed circuit consists of power switch, Pulse Width Generation, Buffer, Zero Current Sensing, Current Sensing Circuit, Clock & Ramp generation, V-I Converter, Soft Start, Compensator and Modulator. Switching Frequency is 1MHz, It operates in CCM when the load current is more than 40mA, and the maximum efficiency is 98.71% at 100mA. Output voltage ripple is 0.98mV(input voltage:3.5V, output voltage:2.5V). The performance of the designed circuit has been verified through extensive simulation using a CMOS $0.18{\mu}m$ technology.