• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1995년도 추계학술대회 논문집
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• pp.320-323
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• 1995

In this paper, in order to improve withstand voltage properties of epoxy resin, IPN(interpenetrating polymer network) method was introduced and the influence was investigated. The sing1e network structure specimen(E series), simultaneous interpenetrating polymer network specimen(EMF series) and pseudo interpenetrating polymer network(EMP series) specimen were manufactured. In order to understand the internal structure properties, scanning electron microscopy method was utilized, rind glass transition temperature was measured. Also, AC voltage dielectric strength, tensile strength and impact strength were measured to investigate influence upon electrical and mechanical properties. As a result, it was confirmed that simultaneous interpenetrating polymer network specimen was the most execellent.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 추계학술대회 논문집 학회본부 C
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• pp.938-940
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• 1998

In order to improve insulating character and ability of insulating system of power apparatus, the interfacial and complex structure is widely used. However, the interface or complex structure of insulation materials is reported as a weak point which causes breakdown. As the interface of insulation system degrades its electrical property and eventually causes a failure, the datailed phenomenon analysis is reported. The object of this paper is to evaluate dielectric property of PET film with the interface. The $tan{\delta}$ increased with the existence of semiconducting layer and showed prominent decrease as a function of temperature. Also, the $tan{\delta}$ showed prominent increase as a function of frequency. The dielectric properties of interfacial were affected by the interface characteristics.

• 대한전자공학회논문지
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• 제25권7호
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• pp.774-779
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• 1988

The homo and hetero-junction diodes were fabricated using BP-Si structure. After removal of Si substrates, schottky diodes were fabricated on the BP bulk. The electrical properties of the diode were examined through current-voltage characteristics curve. The schottky diode with Sb electrode has a cut-in voltage of 0.33V. This value is almost equal to that of the typical schottky diodes. The breakdown voltage of the schottky diode is 30V. When BP was used for photo cell as a window, the conversion efficiency improved from 6.5% to 8.3%, and optical transmissivity of BP invreased in short wavelength region.

• 한국건축시공학회:학술대회논문집
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• 한국건축시공학회 2012년도 춘계 학술논문 발표대회
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• pp.151-152
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• 2012

Recently, there are growing interests in building LCCO₂ Assessment to reduce carbon emissions. However, existing methods of assessment system include inefficiency in the process of CO₂ calculation requiring considerable data input. Therefore, the purpose of this study is to develop an efficient building assessment system appropriate to material production in construction stage. To that end, quantity input technology was limited to data mapping. Also quantity calculation based on work breakdown structure and item codes consisted of hierarchical structure that is based on facet classification were analyzed. As a result, connectivity links of quantity calculation and CO₂ functional units through item codes for data mapping, and assessment system including calculation and database parts were developed.

• 한국건축시공학회:학술대회논문집
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• 한국건축시공학회 2016년도 춘계 학술논문 발표대회
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• pp.235-236
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• 2016

The importance of construction management has been increasing due to the fact that complex construction projects blend several different industries depending on the traits of the construction. This research was conducted to search for a method to enhance efficiency in cost management of construction project and meet the need for reusability of accumulated construction information. The process of detailed estimation and methodology for using standard unit price information has been developed to strengthen the interoperability in cost information by utilizing a standard classification system. The concept of ontology is proposed as a method of connecting construction information based on a standard breakdown structure to increasing the connectivity of the cost information in the construction project. Therefore, construction information knowledge framework is developed in order to improve the efficiency of the detailed estimation work process.

• Journal of Electrical Engineering and information Science
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• 제2권4호
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• pp.106-110
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• 1997

A new SOI NMOSFET with a 'LOCOS-like' shape self-aligned polysilicon gate formed on the recessed channel region has been fabricated by a mix-and-match technology. For the first time, a new scheme for implementing self-alignment in both source/drain and gate structure in recessed channel device fabrication was tried. Symmetric source/drain doping profile was obtained and highly symmetric electrical characteristics were observed. Drain current measured from 0.3${\mu}{\textrm}{m}$ SOI devices with V\ulcorner of 0.77V and Tox=7.6nm is 360$mutextrm{A}$/${\mu}{\textrm}{m}$ at V\ulcorner\ulcorner=3.5V and V\ulcorner=2.5V. Improved breakdown characteristics were obtained and the BV\ulcorner\ulcorner\ulcorner(the drain voltage for 1 nA/${\mu}{\textrm}{m}$ of I\ulcorner at V=\ulcorner\ulcorner=0V) of the device with L\ulcorner\ulcorner=0.3${\mu}{\textrm}{m}$ under the floating body condition was as high as 3.7 V. Problems for the new scheme are also addressed and more advanced device structure based on the proposed scheme is proposed to solve the problems.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권2호
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• pp.116-119
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• 2000

A hybrid SOI bipolar-mode field effect transistor (BMFET) is proposed to improve the current gain. The device characteristics are analyzed and verified numerically for BMFET mode, DMOS mode, and hybrid mode by MEDICI simulation. The proposed SOI BMFET exhibits 30 times larger current gain in hybrid-mode operation by connecting DMOS gate to the p+ gate of BMFET structure as compared with the conventional structure without sacrifice of breakdown voltage and leakage current characteristics. This is due to the DMOS-gate-induced hybrid effect that lowers the barrier of p-body and reduces the charge in p-body.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 E
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• pp.1767-1769
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• 1997

In this paper, interpenetrating polymer network method was introduced in order to improve withstand voltage properties of epoxy resin. The single network structure specimen(E series), simultaneous interpenetrating polymer network specimen(EM series) and pseudo interpenetrating polymer network(EMP series) specimen were manufactured. In order to investigate influence upon electrical properties, dc, ac, and impulse voltage dielectric strength were measured. As a result, it was confirmed that electrical properties of epoxy composites can be superior as IPN introduced to it bring about firm and high density of inner structure.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 2004년도 추계학술대회 및 정기총회
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• pp.490-493
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• 2004

The purpose of this study is to construct technology product concept a deployment model on seeds type R&D projects. For this purpose, we have peformed the following studies : First, technology opportunities and market opportunities through ${\ulcorner}$perception analysis${\lrcorner}$ are captured by perceptional structure of technology experts and customers on the existing technologies and products. Second, the optimal technology product concept deployed by ${\ulcorner}$SAT(System Alternatives Tree)${\lrcorner}$ has been constructed by the ${\ulcorner}$PWBS(Project work Breakdown structure)${\lrcorner}$.

• 전자공학회논문지D
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• 제34D권6호
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• pp.43-49
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• 1997

Tungsten poycide has studied gate oxide reliability and dielectric strength charactristics as the composition of gate electrode which applied submicron on CMOS and MOS device for optimizing gate electrode resistivity. The gate oxide reliability has been tested using the TDDB(time dependent dielectric breakdwon) and SCTDDB (stepped current TDDB) and corelation between polysilicon and WSi$_{2}$ layer. iN the case of high intrinsic reliability and good breakdown chracteristics on polysilicon, confirmed that tungsten polycide layer is a better reliabilify properities than polysilicon layer. Also, hole trap is detected on the polysilicon structure meanwhile electron trap is detected on polycide structure. In the case of electron trap, the WSi$_{2}$ layer is larger interface trap genration than polysilicon on large POCL$_{3}$ doping time and high POCL$_{3}$ doping temperature condition. WSi$_{2}$ layer's leakage current is less than 1 order and dielectric strength is a larger than 2MV/cm.