• Title/Summary/Keyword: bondwire

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Wideband Characterization of Double Bondwires Ribbon for Millimeter-Wave Packaging (밀리미터파 대역 패키징을 위한 이중 본드와이어와 리본의 광대역 특성)

  • Kim, Jin-Yang;Chang, Dong-Pil;Yom, In-Bok;Lee, Hai-Young
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.38 no.7
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    • pp.7-13
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    • 2001
  • The wirebonding is a common interconnection technique for modern microwave devices because of rather simple and reliable processes involved. At millimeter-wave frequencies, however, the bondwire parasitics are significant and consequently limit the external performance of packaged devices. In this paper, we represent wideband characterization of multiple bondwires and ribbon in a frequency range from 20 to 35 GHz. From these results, the double bondwire shows very small insertion loss less than 0.55 dB up to 35 GHz and its performance is comparable to that of the ribbon in the millimeter-wave frequencies. Therefore, the wirebonding is very suitable for millimeter wave packaging in terms of performance and manufacturing cost.

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Low Phase Noise CMOS VCO with Hybrid Inductor

  • Ryu, Seonghan
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.3
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    • pp.158-162
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    • 2015
  • A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

The Destruction Effects of Semiconductors by High Power Electromagnetic Wave (고출력 과도전자파에 의한 반도체 소자의 파괴효과)

  • Hwang, Sun-Mook;Hong, Joo-Il;Huh, Chang-Su
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.9
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    • pp.1638-1642
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    • 2007
  • This paper investigated the destruction effect of the semiconductors by impact of high power electromagnetic wave. The experiments is employed as an open-ended waveguide to study the destruction effects on semiconductor using a 2.45 GHz 600 W Magnetron as a high power electromagnetic wave. The semiconductors are located at a distance of $31cm\sim40cm$ from the open-ended waveguide and are composed of a LED drive circuit for visual discernment. Also the chip condition of semiconductor is observed by SEM(Scanning Electron Microscope) analysis. The semiconductor are damaged by high power electromagnetic wave at about 860 V/m. The SEM analysis of the destructed devices showed onchipwire and bondwire destructions. Based on the result, semiconductor devices should have plan to protect the semiconductor devices form high power electromagnetic wave. And the database from this experiment provides the basis for future investigation.

The gate delay time and the design of VCO using variable MOS capacitance

  • Ryeo, Ji-Hwan
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.99-102
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    • 2005
  • In the paper, a proposed VCO based on bondwire inductances and nMOS varactors was implemented in a standard $0.25\;{\mu}m$ CMOS process. Using the new drain current model and a propagation delay time model equations, the operation speed of CMOS gate will predict the dependence on the load capacitance and the depth of oxide, threshold voltage, the supply voltage, the channel length. This paper describes the result of simulation which calculated a gate propagation delay time by using new drain current model and a propagation delay time model. At the result, When the reverse bias voltage on the substrate changes from 0 voltage to 3 voltage, the propagation delay time is appeared the delay from 0.8 nsec to 1 nsec. When the reverse voltage is biased on the substrate, for reducing the speed delay time, a supply voltage has to reduce. The $g_m$ value of MOSFET is calculated by using new drain current model.

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Breakdown and Destruction Characteristics of the CMOS IC by High Power Microwave (고출력 과도 전자파에 의한 CMOS IC의 오동작 및 파괴 특성)

  • Hong, Joo-Il;Hwang, Sun-Mook;Huh, Chang-Su
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.7
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    • pp.1282-1287
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    • 2007
  • We investigated the damage of the CMOS IC which manufactured three different technologies by high power microwave. The tests separated the two methods in accordance with the types of the CMOS IC located inner waveguide. The only CMOS IC which was located inner waveguide was occurred breakdown below the max electric field (23.94kV/m) without destruction but the CMOS IC which was connected IC to line organically was located inner waveguide and it was occurred breakdown and destruction below the max electric field. Also destructed CMOS IC was removed their surface and a chip condition was analyzed by SEM. The SEM analysis of the damaged devices showed onchuipwire and bondwire destruction like melting due to thermal effect. The tested results are applied to the fundamental data which interprets the combination mechanism of the semiconductors from artificial electromagnetic wave environment and are applied to the data which understand electromagnetic wave effects of electronic equipments.

The Damage of Microcontroller Devices due to Coupling Effects by High Power Electromagnetic Wave (고출력 전자기파의 커플링 효과에 의한 마이크로컨트롤러 소자의 피해)

  • Hong, Joo-Il;Hwang, Sun-Mook;Huh, Chang-Su
    • Journal of the Korea Institute of Military Science and Technology
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    • v.11 no.6
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    • pp.148-155
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    • 2008
  • We investigated the damage effects of microcontroller devices under high power electromagnetic(HPEM) wave. HPEM wave was radiated from the open-ended standard rectangular waveguide(WR-340) to free space. The influence of different reset-, clock-, data-, and power supply-line lengths has been tested. The susceptibility of the tested microcontroller devices was in general much influenced by clock-, reset-, and power supply-line length, little influenced by data-line length. Further the line length was increased, the malfunction threshold was decreased as expected, because more energy couples to the devices. The surfaces of the destroyed microcontroller devices were removed and the chip conditions were investigated with microscope. The microscopic analysis of the damaged devices showed component and bondwire destructions such as breakthroughs and melting due to thermal effects.

Breakdown and Destruction Characteristics of the CMOS and TTL ICs by Artificial Electromagnetic Waves (인위적으로 발생시킨 과도 전자파에 노출된 CMOS와 TTL IC의 오동작 및 파괴 특성)

  • Hong, Joo-Il;Hwang, Sun-Mook;Han, Seung-Mook;Huh, Chang-Su
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1512-1513
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    • 2007
  • In this paper the influence of CMOS- and TTL-technology on the breakdown and destruction effects by artificial electromagnetic waves is determined. Different electronic devices(3 CMOS & 5 TTL) were exposed to high amplitude electromagnetic waves. CMOS ICs were occurred only destruction below the max electric field and TTL ICs were occurred breakdown and destruction below the max electric field. The SEM analysis of the destruction devices showed onchipwire and bondwire destruction like melting due to thermal effect. The test results are applied to the data which understand electromagnetic wave effects of electronic equipments.

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Breakdown and Destruction Characteristics of the TTL IC by the Artificial Microwave (인위적인 전자파에 의한 TTL IC의 오동작 및 파괴 특성)

  • Hong, Joo-Il;Hwang, Sun-Mook;Huh, Chang-Su
    • Journal of the Korean Society of Safety
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    • v.22 no.5
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    • pp.27-32
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    • 2007
  • We investigated the damage of the TTL ICs which manufactured five different technologies by artificial microwave. The artificial microwave was rated at a microwave output from 0 to 1000W, at a frequency of 2.45GHz. The microwave power was extracted into a standard rectangular waveguide(WR-340) and TTL ICs were located into the waveguide. TTL ICs were damaged two types. One is breakdown which means no physical damage is done to the system and after a reset the system is going back into function. The other is destruction which means a physical damage of the system so that the system will not recover without a hardware repair. TTL SN74S08N and SN74ALS08N devices get a breakdown and destruction occurred but TTL SN74LS08N, SN74AS08N and 74F08N devices get a destruction occurred. Also destructed TTL ICs were removed their surface and a chip conditions were analyzed by SEM. The SEM analysis of the damaged devices showed onchipwire and bondwire destruction like melting due to thermal effect. The tested results expect to be applied to the fundamental data which interprets the combination mechanism of the semiconductors from artificial microwave environment.

Package Optimization for Maximizing the Modulation Performance of 10 Gbps MQW Modulator (10 Gbps용 MQW 광변조기의 변조 성능 극대화를 위한 최적 패키지에 관한 연구)

  • 김병남;이해영
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.10
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    • pp.91-97
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    • 1998
  • The modulation performance of 10 Gbps electro-absorption InGaAsP/InGaAsP strain compensated MQW (Multiple Quantum Well) modulator module depends on the modulator as well as the package parasitics. The high frequency package parasitics resulting from various structural discontinuities, limit the modulation bandwidth and increase the chirp-parameter. Therefore, we propose the double bondwires embedded in dielectric materials to minimize the bondwire parasitics. Using the proposed structure with 50 $\Omega$ terminating resistor, the modulation bandwidth is greatly increased by 125 % than the bare chip and the chirp-parameter is also reduced. This technique can be used in optimizing the package of high speed external modulators.

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Design Issues of CMOS VCO for RF Transceivers

  • Ryu, Seong-Han
    • Journal of electromagnetic engineering and science
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    • v.9 no.1
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    • pp.25-31
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    • 2009
  • This paper describes CMOS VCO circuit design procedures and techniques for multi-band/multi-standard RF transceivers. The proposed techniques enable a 4 GHz CMOS VCO to satisfy all requirements for Quad-band GSMIEDGE and WCDMA standards by achieving a good trade-off among important specifications, phase noise, power consumption, modulation performance, and chip area efficiency. To meet the very stringent GSM T/Rx phase noise and wide frequency range specifications, the VCO utilizes bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain(30$\sim$50 MHz/V) and an on-chip $2^{nd}$ harmonic noise filter. The proposed VCO is implemented in $0.13{\mu}m$ CMOS technology. The measured tuning range is about 34 %(3.17 to 4.49 GHz). The VCO exhibits a phase noise of -123 dBc/Hz at 400 kHz offset and -145 dBc/Hz at 3 MHz offset from a 900 MHz carrier after LO chain. The calculated figure of merit(FOM) is -183.5 dBc/Hz at 3 MHz offset. This fully integrated VCO occupies $0.45{\times}0.9\;mm^2$.