• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.4
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• pp.70-76
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• 2009

In this paper, we propose the design criteria of the pre-processing scheme used in ABAB type quasi-orthogonal space-time block code(QOSTBC) and derive. The proposed design criteria show how to obtain full-diversity and full-rate (FDFR) property, single-symbol decodability, and increased coding gam. We design an improved ABAB type QOSTBC using the proposed design criteria. The desinged QOSTBC has a superior performance to Dalton's QOSTBC and inherits the merits of Dalton's QOSTBC, which are FDFR property, and single symbol decodability for PAM signal constellation.

• Journal of the Korean Data and Information Science Society
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• v.24 no.1
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• pp.95-103
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• 2013

Nonparametric procedure in randomized block design (RBD) was proposed by Friedman (1937) for general alternatives. Also Page (1963) suggested the test for ordered alternatives in RBD. In this paper, we proposed the new nonparametric method in randomized block design using aligned method suggested by Hodges and Lehmann (1962) and the joint placement described in Chung and Kim (2007). Also, Monte Carlo simulation study was adapted to compare the power of the proposed procedure with those of previous procedure.

• Journal of electromagnetic engineering and science
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• v.6 no.4
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• pp.244-252
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• 2006

A block Jacket transform and. its block inverse Jacket transformn have recently been reported in the paper 'Fast block inverse Jacket transform'. But the multiplication of the block Jacket transform and the corresponding block inverse Jacket transform is not equal to the identity transform, which does not conform to the mathematical rule. In this paper, new binary block Jacket transforms and the corresponding binary block inverse Jacket transforms of orders $N=2^k,\;3^k\;and\;5^k$ for integer values k are proposed and the mathematical proofs are also presented. With the aid of the Kronecker product of the lower order Jacket matrix and the identity matrix, the fast algorithms for realizing these transforms are obtained. Due to the simple inverse, fast algorithm and prime based $P^k$ order of proposed binary block inverse Jacket transform, it can be applied in communications such as space time block code design, signal processing, LDPC coding and information theory. Application of circular permutation matrix(CPM) binary low density quasi block Jacket matrix is also introduced in this paper which is useful in coding theory.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.468-472
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• 2004

In this paper a VLSI design for the automatic magnetizing system has been presented. This is the design of a peripheral controller, which magnetizes CRTs and computers monitors and controls the automatic inspection system. We implemented a programmable peripheral interface(PPI) circuit of the control and protocol module for the magnetizer controller by using a O.8um CMOS SOG(Sea of Gate) technology of ETRI. Most of the PPI functions has been confirmed. In the conventional method, the propagation/ramp delay model was used to predict the delay of cells, but used to model on only a single cell. Later, a modified "apos;Linear delay predict model"apos; was suggested in the LODECAP(LOgic Design Capture) by adding some factors to the prior model. But this has not a full model on the delay chain. In this paper a new "apos;delay predict equationapos;" for the design of the timing control block in PPI system has been suggested. We have described the detail method on a design of delay chain block according to the extracted equation and applied this method to the timing control block design.

• International Journal of Concrete Structures and Materials
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• v.18 no.1E
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• pp.11-16
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• 2006

The use of the current ACI 318 stress block parameters has been reported to provide unconservative estimations of the moment capacities for high-strength concrete columns. Accordingly, several concrete stress block parameters have been recently proposed. This paper discusses various concrete stress block parameters for high-strength concrete and their influences on the code provisions. In order to adopt the proposed stress block parameters to the design code, it is necessary to understand the impact of the change of the stress block parameters on various aspects of the code provisions. For this purpose, the influence of using of different stress block parameters on the location of the neutral axis and the tensile strain in extreme tension steel as well as the axial and moment capacities are investigated. In addition, the influence on the prestressed concrete members is also elucididated.

• Journal of the Korea institute for structural maintenance and inspection
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• v.7 no.1
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• pp.207-215
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• 2003

Developed is a new environment-friendly concrete-block retaining wall system. The conventional analysis methods are not directly applicable because the proposed concrete-block wall system is made of by interlocking the blocks with shear keys. Therefore, the shear analysis as well as stability analysis have been conducted to secure the safety of block-wall system. Overall slope stability analysis was also performed. An appropriate strengthening method was developed to ensure the safety when the block-wall system is relatively high. The method of analysis for strengthening the concrete-block wall system was also proposed. The proposed environment-friendly concrete block retaining wall system shows reasonable safety and can be a good construction method for retaining walls and river bank walls.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.12
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• pp.1554-1563
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• 1999

This paper presents the design of high speed processor for a sequence logic control using field programmable gate array(FPGA). The sequence logic controller is widely used for automating a variety of industrial plants. The FPGA designed by VHDL consists of program and data memory interface block, input and output block, instruction fetch and decoder block, register and ALU block, program counter block, debug control block respectively. Dedicated clock inputs in the FPGA were used for high speed execution, and also the program memory was separated from the data memory for high speed execution of the sequence instructions at 40 MHz clock. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 16 bits or 32 bits respectively. And the real time debug operation was implemented for easy debugging the designed processor. This FPGA was synthesized by pASIC 2 SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to sequence control system with inputs and outputs of 256 points. The designed processor for the sequence logic was compared with the control system using the DSP(TM320C32-40MHz) and conventional PLC system. The designed processor for the sequence logic showed good performance.

• Journal of Advanced Marine Engineering and Technology
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• v.11 no.1
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• pp.72-79
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• 1987

When the wall temperature is very high, a stable vapor film covers the heat transfer surface. The vapor film creates a strong thermal resistance when heat is transferred to the liquid though it. This phenomenon, called "film boiling" is very important in the heat treatment of metals, the design of cryogenic heat exchangers, and the emergency cooling of nuclear reactors. In the practical engineering problems of the transient cooling process of a high temperature wall, the wall temperature history, the variation of the heat transfer coefficients, and the wall superheat at the rewetting points, are the main areas of concern. These three areas are influenced in a complex fashion such factors as the initial wall temperature, the physical properties of both the wall and the coolant, the fluid temperature, and the flow state. Therefore many kinds of specialized experiments are necessary in the creation of precise thermal design. The object of this study is to investigate the heat transfer characteristics in the transient cooling process of a high temperature wall. The slow transient cooling experiment was carried out with a copper block of high thermal capacity. The block was 240 mm high and 79 mm O.D.. The coolant flowed throuogh the center of a 10 mm diameter channel in the copper block. In the copper block, three sheathed thermocouples were placed in a line perpendicular to the flow. These thermocouples were used to take measurements of the temperature histories of the copper block.

• Restorative Dentistry and Endodontics
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• v.44 no.3
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• pp.23.1-23.9
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• 2019

Objectives: The aim of this study was to investigate the microshear bond strength (${\mu}SBS$) of different universal adhesive systems applied to hybrid computer-aided design/computer-aided manufacturing (CAD-CAM) restorative materials repaired with a composite resin. Materials and Methods: Four types of CAD-CAM hybrid block materials-Lava Ultimate (LA), Vita Enamic (VE), CeraSmart (CS), and Shofu Block HC (SH)-were used in this study, in combination with the following four adhesive protocols: 1) control: porcelain primer + total etch adhesive (CO), 2) Single Bond Universal (SB), 3) All Bond Universal (AB), and 4) Clearfil Universal Bond (CU). The ${\mu}SBS$ of the composite resin (Clearfil Majesty Esthetic) was measured and the data were analyzed using two-way analysis of variance and the Tukey test, with the level of significance set at p < 0.05. Results: The CAD-CAM block type and block-adhesive combination had significant effects on the bond strength values (p < 0.05). Significant differences were found between the following pairs of groups: VE/CO and VE/AB, CS/CO and CS/AB, VE/CU and CS/CU, and VE/AB and CS/AB (p < 0.05). Conclusions: The ${\mu}SBS$ values were affected by hybrid block type. All tested universal adhesive treatments can be used as an alternative to the control treatment for repair, except the AB system on VE blocks (the VE/AB group). The ${\mu}SBS$ values showed variation across different adhesive treatments on different hybrid CAD-CAM block types.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.12
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• pp.3653-3659
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• 2009

Inter-prediction is always the main bottleneck in H.264/AVC baseline profile. This paper describes an efficient inter-prediction hardware architecture design. H.264/AVC decoder supports various block types but reference software considers only the $4{\times}4$ block when the reference block is being fetched. This causes duplicated pixels which needs extra fetch cycles. In order to eliminate some of the duplicated pixels, the $8{\times}8$ and $4{\times}4$ blocks were considered in the previous design. If the block size is larger than or equal to the $8{\times}8$ block, it will be decomposed into several $8{\times}8$ blocks and if the block size is smaller than the $8{\times}8$ block it will be decomposed into several $4{\times}4$ blocks. Comparing with the reference software, the maximum and minimum cycle reduction of the previous design are 41.5% and 28.2% respectively. For further reduction of the fetch cycles, the various block types are considered in this paper. As a result, the maximum cycle reduction is 18.6% comparing with the previous design.