• Publications of The Korean Astronomical Society
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• v.27 no.5
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• pp.419-429
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• 2012

In this paper, we propose a new re-quantization method after FFT processing to prevent the distortion of correlation result of VCS (VLBI Correlation Subsystem). The re-quantization is used to rearrange the data bit so as to reduce the data rate processed as 16-bit of FFT result of VCS. Having done this procedure, we found that the distorted spectrum of correlation result occurred in the delay tracking experiments by the re-quantization method introduced for initial design of VCS. In order to solve this, two kinds of re-quantization method, that is, the comparison and selection-type, are proposed. The first is to re-quantize the FFT result as a valid-bit by comparing with the input data after determining the adequate threshold. The second is manually to select the valid-bit of FFT result after finding the valid-field of data according to the bit-distribution of input data. We confirmed that the second is more effective compared with the first through the experimental result, and it will be implemented without so much modification of applied method in the condition of the limited resource of FPGA. The re-quantization is, however, carried out with 4-bit in the proposed second method for FFT result, and then the distortion of correlation result is also appeared. To fix this problem, the bit for re-quantization is extended to 8-bit. The proposed 8-bit selection-type is effectively verified so that the distortion of correlation result disappeared by applying to VCS in consequence of the simulation and correlation experiments.

• The Journal of the Acoustical Society of Korea
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• v.9 no.2
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• pp.61-69
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• 1990

We have investigated the digital bit synchronization problem in baseband communication receiver systems using the Gauss-Markov estimation technique which is equivalent to the weighted least square method. The realized bit synchronizer, including the data detector, processes the input signal two dimensionally into the transition phase and data level under the white Gaussian noise environment. We have confirmed the relization of the bit synchronizer via computer simulation. In addition, we have compared and evaluated the estimation error performance of the proposed method with that of the conventional DTTL method and of the minimum likelihood method.

• Journal of Sensor Science and Technology
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• v.20 no.6
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• pp.412-419
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• 2011

In this paper, we used the inter-bit noise detection method in order to reduce the effects of noise light in a visible light identification system that uses a visible LED as a carrier source. A visible light identification system consists of a reader and a transponder. When the enable signal from the reader is detected, the transponder encodes the response data in RZ(Return-to-Zero) bit stream and sends response signal by modulating a visible LED. The reader detects the response signal mixed with noise light, samples the noise voltage in each blank low time between data bits of the RZ signal, and recovers the original data by subtracting the sampled noise from the received signal. In experiments, we improved the signal-to-noise ratio by 20dB using the inter-bit noise detection method.

• Proceedings of the KSRS Conference
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• 2007.10a
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• pp.537-539
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• 2007

Telemetry processing system requires minimum bit transition level in data streams to maintain a bit synchronization while receiving telemetry signal. PN code has a capability of providing the bit transition and is widely used in the packet communication of CCSDS. CCSDS PN code that generator polynomial is $h(x)=x^{8}+x^{7}+x^{5}+x^{3}+1$, and the random bit sequence that is generated from this polynomial is repeated with the cycle of 255 bits. As the resolution of satellite image increases, the size and transmission rate of data increases. To process of huge and bulky size of satellite image, the speed of CCSDS PN Processing is very important. This paper introduces the way of improving the CCSDS PN Processing speed through processing 128 bits at one time using the feature of cyclic structure that repeats after first 255 bytes by grouping the random bit sequence with 1 byte and Intel Streaming SIMD Extensions 2. And this paper includes the comparison data of processing speed between SSE2-applied implementation and not-applied implementation, in addition, the measured value of speed improvement.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.1 s.343
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• pp.121-126
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• 2006

This paper report on the design and implementation of a 9.6kbps DSSS CDMA modem for a medium speed wireless link. The proposed modem provides a general purpose I/O interface with a microprocessor. The I/O interface consists of 8-bit data bus, chip enable, read/write, and interrupt pins. In transmit block, the 8-bit data delivered from the I/O interface buffer is converted to 9.6kbps serial data, which are spreaded into 76.8kcps with 8-bit PN code generated inside the modem by direct sequence method. An 8-bit training sequence is preceded in the data frame for data synchronization in receiver. In receiver block the PN code is synchronized from the received data spreaded to 76.8kcps and find the data timing from the 8-bit training sequence. We have used the Early-and-Late integration method. The modem has been implemented and verified using a Xilix FPGA board and has been fabricated as an ASIC CHIP through Hynir $0.25{\mu}m$ CMOS. The multiple accessing method is DSSS CDMA.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.7 no.1
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• pp.132-148
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• 2013

Via the Internet, the information infrastructure of modern health care has already established medical information systems to share electronic health records among patients and health care providers. Data hiding plays an important role to protect medical images. Because modern medical devices have improved, high resolutions of medical images are provided to detect early diseases. The high quality medical images are used to recognize complicated anatomical structures such as soft tissues, muscles, and internal organs to support diagnosis of diseases. For instance, 16-bit depth medical images will provide 65,536 discrete levels to show more details of anatomical structures. In general, the feature of low utilization rate of intensity in 16-bit depth will be utilized to handle overflow/underflow problem. Nowadays, most of data hiding algorithms are still experimenting on 8-bit depth medical images. We proposed a novel reversible data hiding scheme testing on 16-bit depth CT and MRI medical image. And the peak point and zero point of a histogram are applied to embed secret message k bits without salt-and-pepper.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.1
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• pp.652-657
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• 2015

BitTorrent is an innovative protocol related to file-sharing and file-transferring, which allows users to receive pieces of files from multiple sharer on the Internet to make the pieces into complete files. In reality, however, free distribution of illegal or copyright related video data is counted for crime. Difficulty of regulation on the copyright of data on BitTorrent is caused by the fact that data is transferred with the pieces of files instead of the complete file formats. Therefore, the classification process of file formats of the digital contents should take precedence in order to restore digital contents from the pieces of files received from BitTorrent, and to check the violation of copyright. This study has suggested SVM classifier for the classification of digital files, which has the feature vector of histogram differential on the pieces of files. The suggested classifier has evaluated the performance with the division factor by applying the classifier to three different formats of video files.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.8 no.2
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• pp.76-81
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• 1983

PCM-NRZ/FM Telemetry system is constructed on the basis of RF link with FM modulatedand NRZ-L binary coded PCM data are assumed to transmit through 5th-order Bessel filter. Upon demodulated by the limiter-discriminator at the receiver, the probability of bit error, which is important for performance estimation of digital system, is analyzed against SNR. The analysis based on the following parameters, that is bit rate 140kHz, frequency of pre-modulation filter f-100kHz, maximum frequency deviation of transmitter 2f=300kHz, was performed. As a result, when the telemetry system with the parameters above is designed, the probability of bit error is obtained as 10 along with fT=0.7 and h=2, T=2.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.187-189
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• 2018

In this paper, the optimal design conditions for hardware implementation of the Secure Hash Algorithm3-512 (SHA3-512) hash function were analyzed. Five SHA3-512 hash cores with data-path of 64-bit, 320-bit, 640-bit, 960-bit, and 1600-bit were designed, and their functionality were verified by RTL simulation. Based on the results synthesized with Xilinx Virtex-5 FPGA device, we evaluated the performance of the SHA3-512 hash cores, including maximum frequency, throughput, and occupied slices. The analysis results show that the best hardware performance of SHA3-512 hash core can be achieved by designing it with 1600-bit data-path.

• Journal of Korea Multimedia Society
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• v.8 no.2
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• pp.201-210
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• 2005

This paper proposes a power efficient 2-dimensional DCT/IDCT architecture driven by input data to be processed. The architecture achieves low power by taking advantage of the typically large fraction of zero and small-valued input processing data in video and image data compression. In particular, it skips multiplication by zero and dynamically activates/deactivates required bit-slices of fine-grain bit partitioned adders within multipliers and accumulators using simple input ANDing and bit-slice MASKing. The processed results from 1-D DCT/IDCT do not have unnecessary sign extension bits (SEBs), which are used for further power reduction in matrix transposer. The results extracted by bit-level transition activity simulations indicate significant power reduction compared to conventional designs.