• The Transactions of the Korean Institute of Power Electronics
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• v.2 no.3
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• pp.26-36
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• 1997

An single stage AC/DC converter based on half bridge topology suitable for low power level applications is proposed. The proposed converter has high power factor, low harmonic distortion, and tight output regulations. Asymmetrical control and synchronous rectification are adopted to reduce the switching loss and rectification loss, respectively. The modelling employing average modelling method and detailed analysis are performed to derive the design equations. According to these design equations, a prototype converter has been designed and experimented. This prototype meets the IEC 555-2 regulations with near unity power factor and high efficiency.

• Journal of Power Electronics
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• v.7 no.4
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• pp.328-335
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• 2007

A conventional Single-Stage Power-Factor-Correction (PFC) AC/DC converter has a link capacitor voltage problem under high line input and low load conditions. In this paper, this problem is analyzed by using the voltage conversion ratio of the DC/DC conversion cell. By applying this analysis, a new Single-Stage PFC AC/DC converter with a boost PFC cell integrated with a Voltage-Doubler Rectified Asymmetrical Half-Bridge (VDRAHB) is proposed. The proposed converter features good power factor correction, low current harmonic distortions, tight output regulations and low voltage of the link capacitor. An 85W prototype was implemented to show that it meets harmonic requirements and standards satisfactorily with near unity power factor and high efficiency over universal input.

• Proceedings of the KIEE Conference
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• summer
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• pp.1151-1153
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• 2004

In this paper, small-signal modeling and closed-loop performance of charge control employed to an asymmetrical half-bridge (ASHB) dc-to-dc converters are investigated. The charge control is selected as an alternative to the conventional voltage-mode control and peak current-mode (PCM) control, which have their respective limitations and problems when adapted to ASHB dc-to-dc converters. The current-loop dynamics of the charge control are presented in comparison with those of voltage-mode and PCM control. This paper demonstrates that the charge control offers better dynamic performance compared to voltage-mode control and superior noise characteristics compared to PCM control. The potential problem of charge control are also addressed.

• Proceedings of the KIEE Conference
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• 2004.10a
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• pp.169-172
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• 2004

This paper presents the Asymmetric Half-Bridge converter using current-doubler rectifier. Resonant conditions of the asymmetrical soft switching Half-Bridge converter is analyzed. Current-doubler converter has small voltage and current ripple. The comparison of topology compared to the secondary rectification for center-tap type and current-doubler type are discussed. Experimental result are obtained on a 5V, 20A DC/DC Half-Bridge converter MOSFET based prototype for the 100W.

• Journal of Power Electronics
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• v.12 no.2
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• pp.258-267
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• 2012

An interleaved single-stage AC/DC converter with a boost converter and an asymmetrical half-bridge topology is presented to achieve power factor correction, zero voltage switching (ZVS) and load voltage regulation. Asymmetric pulse-width modulation (PWM) is adopted to achieve ZVS turn-on for all of the switches and to increase circuit efficiency. Two ZVS half-bridge converters with interleaved PWM are connected in parallel to reduce the ripple current at input and output sides, to control the output voltage at a desired value and to achieve load current sharing. A center-tapped rectifier is adopted at the secondary side of the transformers to achieve full-wave rectification. The boost converter is operated in discontinuous conduction mode (DCM) to automatically draw a sinusoidal line current from an AC source with a high power factor and a low current distortion. Finally, a 240W converter with the proposed topology has been implemented to verify the performance and feasibility of the proposed converter.

• Journal of Power Electronics
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• v.13 no.1
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• pp.20-30
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• 2013

This paper presents a soft switching DC/DC converter for high voltage application. The interleaved pulse-width modulation (PWM) scheme is used to reduce the ripple current at the output capacitor and the size of output inductors. Two converter cells are connected in series at the high voltage side to reduce the voltage stresses of the active switches. Thus, the voltage stress of each switch is clamped at one half of the input voltage. On the other hand, the output sides of two converter cells are connected in parallel to achieve the load current sharing and reduce the current stress of output inductors. In each converter cell, a half-bridge converter with the asymmetrical PWM scheme is adopted to control power switches and to regulate the output voltage at a desired voltage level. Based on the resonant behavior by the output capacitance of power switches and the transformer leakage inductance, active switches can be turned on at zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. The current doubler rectifier is used at the secondary side to partially cancel ripple current. Therefore, the root-mean-square (rms) current at output capacitor is reduced. The proposed converter can be applied for high input voltage applications such as a three-phase 380V utility system. Finally, experiments based on a laboratory prototype with 960W (24V/40A) rated power are provided to demonstrate the performance of proposed converter.

• Journal of Power Electronics
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• v.6 no.3
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• pp.187-194
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• 2006

A new asymmetrical pulse width modulation (PWM) half bridge converter with improved ZVS performance is proposed. The ZVS operation of the proposed converter can be maintained from no load to full load conditions since the magnetizing current of the transformer contributes to the ZVS operation at light loads without considerable conduction loss of the transformer and switch. Synchronous rectification is employed to reduce the rectification loss. Operational principles, large signal modeling, ZVS analysis and design equations are presented. Experimental results demonstrate that the proposed converter can achieve a large ZVS range and significant improvement in efficiency for a 100W (5V, 20A) prototype converter.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.24 no.4
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• pp.81-94
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• 2010

This paper presents a high efficiency resonant asymmetrical half-bridge flyback converter. The primary half-bridge circuit of the converter operates by a soft-switching type using the asymmetrical pulse-width modulation (PWM) method with the resonant capacitance and transformer leakage inductance. The secondary flyback circuit of the proposed converter utilizes a synchronous rectifier, which operates by a new voltage-driven method with a simple drive circuit. Thus the proposed converter improves the total efficiency. This paper explains the operational principle of the proposed converter by each mode and shows the converter design consideration and a design example for the prototype converter, respectively. After that, the proposed simple driving technique of the synchronous rectifier by a voltage-driven method is explained, briefly. The designed prototype converter has wide input voltage (AC $V_{in,rms}$=75~265[V]), 5[V] DC output voltage, and 100[W] output power. To verify the excellent performance of the proposed converter, the designed prototype is implemented and experimented. The good performance of the proposed converter is shown through the experimental results.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1401-1403
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• 2005

This paper presents generalized small-signal models for asymmetrically-driven double-ended dc-to-dc converters. The proposed small-signal models include the effects of the parasitic resistances, which have dominant influence on the damping of the secondary power stage double-pole. To confirm the validity of new models, an asymmetrical half-bridge converter with center-taped rectifier and a forward-flyback converter with current doubler rectifier were built, and their performances were compared with the theoretical predictions.

• Proceedings of the KIPE Conference
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• 2008.10a
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• pp.140-142
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• 2008

본 논문에서는 새로운 공유결합 인덕터를 이용한 비대칭 입력전압형 하프브릿지 컨버터를 제안하고 그 정상상태 해석결과를 보고한 것이다. 제안된 컨버터는 반도체 스위치와 주요 소자를 이상적으로 가정하여 내부손실을 무시한 등가회로를 유도하였고 등가회로로부터 스위치의 상태에 따른 상태별 등가회로로부터 주요 소자에 대한 특성식을 나타내었고 최종적으로는 컨버터의 정상상태 특성식을 유도하였으며 특성식의 타당성을 확인하기 위해서 시험회로를 구성하였고 그 결과 제안 회로방식의 정상상태 해석결과를 검증할 수 있었다.