• 제어로봇시스템학회논문지
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• 제14권6호
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• pp.564-572
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• 2008

The performance of the direct adaptive time-delay command shaping filter depends on the select time-delay. In the previously introduced direct adaptive command shaping filter, however, the time-delay value is fixed and only the magnitudes of the impulses are learned. In this paper, the authors introduce a new scheme to adapt the time-delay which is to be used in conjunction with the direct adaptive command shaping for the improved vibration suppression in flexible motion system. In order to formulate the time-delay adaptation scheme, the authors have analyzed the effect of the time-delay value on the performance of the direct adaptive command shaping filter. By modifying the direct adaptation formula based on the analysis result the authors have established a set of equations to adapt the time-delay toward the optimal value. Simulation results show the effectiveness of the proposed time-delay adaptation approach for the improved vibration suppression.

• 대한전자공학회논문지
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• 제24권4호
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• pp.701-707
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• 1987

This paper is concerned with an accurate delay time modling of the ED MOS logic gates and its application to the multiple delay logic simulator. The proposed delay model of the ED MOS logic gate takes account of the effects of not only the loading conditions but also the slope of the input waveform. Defining delay as the time spent by the current imbalance of the active inverter to charge and discharge the output load, with respect to physical reference levels, rise and fall model delay times are obtained in an explicit formulation, using optimally weighted imbalance currents at the end points of the voltage transition. A logic simulator which uses multiple rise/fall delays based on the model as decribed in the above has been developed. The new delay model and timing verification method are evaluated with repect to delay accuracy and execution time.

• 한국통신학회논문지
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• 제37A권10호
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• pp.895-902
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• 2012

본 논문에서는 비선형 전력증폭기(PA:power amplifier)의 AM/PM 비선형 왜곡특성을 포함하는 군 지연을 보상하는 새로운 등화기를 제안한다. 군 지연 특성은 각 주파수 성분에 따라 서로 다르게 나타나는 상수가 아닌 비선형 시간지연이다. 전력증폭기에서 발생되는 AM/PM 특성으로 인한 위상 왜곡 현상은 군 지연을 증가시키는 주요한 요인이다. 이러한 군 지연 왜곡으로 신호 성상도에서 신호는 퍼지면서 회전하게 된다. 위와 같은 문제점을 고려하여 각 주파수 성분에 따라 다르게 나타나는 비선형 시간지연을 정적인 군지연으로 구분하고, PA의 AM/PM 특성인 입력신호 크기에 따라서 위상 천이가 다르게 발생하는 것을 동적인 군 지연으로 구분한다. 정적인 군 지연은 주파수 영역에서 Type-Based 방법으로 위상 왜곡을 추정 및 보상하고 동적인 군 지연은 시간영역에서 위상회전을 보상한다. 제안된 군 지연 보상기법으로 전력증폭기의 AM/PM 특성을 포함한 군 지연 특성을 충분히 보상할 수 있음을 확인하였다.

• 대한전자공학회논문지SD
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• 제38권4호
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• pp.266-276
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• 2001

빠른 반도체 기술의 발전으로 인하여 VLSI 회로의 복잡도는 크게 증가하고 있다. 그래서 복잡한 회로를 테스팅하는 것은 아주 어려운 문제로 대두되고 있다. 또한 집적회로의 증가된 집적도로 인하여 여러 가지 형태의 고장이 발생하게 됨으로써 테스팅은 더욱 중요한 문제로 대두되고 있다. 이제까지 일반적으로 지연 고장 테스팅에 대한 신뢰도는 가정된 고장의 개수에 대한 검출된 고장의 개수로 표현되는 전통적인 고장 검출율로서 평가되었다. 그러나 기존의 교장 검출율은 고장 존재의 유무만을 고려한 것으로써 실제의 지연 고장 테스팅에 대한 신뢰도와는 거리가 있다. 지연 고장 테스팅은 고착 고장과는 달리 경로의 진행 지연과 지연 결함 크기 그리고 시스템 동작 클럭 주기에 의존하기 때문이다. 본 논문은 테스트 중인 경로의 진행 지연과 지연 결함 크기를 고려한 새로운 고장 검출율 메트릭으로서지연 결함 고장 검출율(delay defect fault coverage)을 제안하였으며, 지연 결함 고장 검출율과 결함 수준(defect level)과의 관계를 분석하였다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1571-1576
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• 2005

DCS has many processing components and various communication elements. And its communication delay characteristic is affected diverse operating situation and context. Especially, binding signal which traversed from one control-node to another control-node undergo all sort of delay conditions. So its delay value has large deviation with the lapse of time, and the measurement of delay statistics during long time is very difficult by using general oscilloscope or other normal instruments. This thesis introduces the design and implementation of PC-based BDAS(Binding Delay Analysis System) System developed to overcomes these hardships. The system has signal-generator, IO-card, data-acquisition module, delay-calculation and analyzer module, those are implemented on industrial standard PC/Ethernet hardware and Windows/Linux platforms. This system can detect accurate whole-system-wide delay time including io, control processing and network delay, in the resolution of msec unit, and can analyze each channel's delay-historic data which is maintained by realtime database. So, this system has strong points of open system architecture, for example, user-friendly environment, low cost, high compatibility, simplicity of maintenance and high extension ability. Of all things, the measuring capability of long-time delay-statistics obtained through historic-DB make the system more valuable and useful, which function is essential to analyze accurate delay performance of DCS system. Using this system, the verification of delay performance of DCS for nuclear power plants is succeeded in KNICS(Korea Nuclear Instrumentation & Control System) projects

• 제어로봇시스템학회논문지
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• 제6권1호
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• pp.1-7
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• 2000

This paper studies the delay-characteristics using the singular values and vectors of Hankel operators for input delay systems. First, the computational method of Hankel singular values and their corresponding singular vectors are introduced, and then it is analytically provea that all the Hankel singular vlues have a monotone increasing properties as the length of delay time increases. Furthermore, through a simple numerical example, it is shown that the Hankel singular values are dependent only on the ratio of the time constant of a lumped parameter system to the length of delay , and in case that the time constant is relatively larger than the delay time, the lumped parameter characteristic has a great influence on the input delay systems.

• Journal of Preventive Medicine and Public Health
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• 제26권4호
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• pp.650-660
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• 1993

This study aims to describe the causes of medically unnecessary hospital stay at a teaching tertiary hospital, using modified version of Delay Tool in which the causes of delay are divided into slx major categories : delay related to test scheduling, test results, surgery, medical staff, patient/family, and administration. For the analysis of hospital stay, 6,479 inpatient-days were reviewed in two medical and four surgical departments for one month. Initially inappropriate hospital stays were identified using Appropriateness Evaluation Protocol (AEP), and causes of delay listed in Delay Tool were assigned to each of them. In both medical and surgical services, the most important cause of delay was related to medical staffs, ranging from 3.6% to 51.6% of total inpatient days. Next important category was delay related to test scheduling in medical services ($4.7{\sim}9.2%$), and delay related to surgery in surgical services ($7.3{\sim}15.0%$). Among subcategories of delay related to medical staffs, delay due to conservative care was the most important cause of inappropriate hospital stay ($2.9{\sim}6.4%$). Each clinical departments had different distribution among delay categories, which could not be fully justified by their clinical charateristics. The Delay Tool would be helpful in exploring factors related to the inefficient use of hospital beds. As a measurement tool of inappropriate hospital stay, however, the Delay Tool should be refined in the definitions of categories and its contents.

• 대한전자공학회논문지
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• 제15권5호
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• pp.13-18
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• 1978

본 논문에서는 PLL의 pull-in 특성을 개선하기 위하여 delay switching PL난을 제시하였다. phase detector와 low grass filter사이에 간단한 RC delay회로를 삽입하고, 90° shift 시킨 Phase detector출력에 의하여 delay time을 switching하였다. 그 결과 pull-in range는 lock range의 1/2이상으로 넓힐 수 있었으며 pull-in time도 개선되었다. 이 개선된 Pull-in특성은 근사적으로 해석되었으며 실험으로 확인되었다.

• 한국군사과학기술학회지
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• 제12권6호
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• pp.719-726
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• 2009

A delay system in fuze for high explosive shell is an important safety device, but failure in the delay system usually causes failure of the shell. Root-cause analysis of failure in the delay system is required since failure in over 10-years stored delay system recently occurs. In this paper, failure in the delay system was reproduced experimentally to examine aged characteristics of the delay system, and the failed delay system shows the same characteristics as ones of failed delay systems in field. Based on the reproduced experiments, accelerated life testings and the data analysis of failure times of delay systems were performed to predict the storage lifetime.

• 전자공학회논문지C
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• 제34C권6호
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• pp.11-21
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• 1997

The delay models for CMOS invertr presented so far predicted the delay time quite accurately whens input transition-time is very small. But the problem that the accuracy is inclined to decrease becomes apparent as input transition tiem increases. In this paper, a delay model for CMOS inverter is presented, which accuractely predicts the delay time even though input transition-time increases. To inverter must be included in modeling process because the main reason of inaccuracy as input transition tiem is the leakage current through the complementary MOS. For efficient modeling, this paper first models the MOSes with simple I-V charcteristic, with which both the pMOS and the nMOS are considered easily in calculating the inverter delay times. This resulting model needs few parameters and re-models each MOS effectively and simply evaluates output voltage to predict delay time, delay values obtained from this effectively and simply evaluates output voltage to predict delay time, delay values obtained from this model have been found to be within about 5% error rate of the SPICE results. The calculation time to predict the delay time with the model from this paper has the speed of more than 70times as fast as to the SPICE.