• Title/Summary/Keyword: and Parallel Processing

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High-speed Design of 8-bit Architecture of AES Encryption (AES 암호 알고리즘을 위한 고속 8-비트 구조 설계)

  • Lee, Je-Hoon;Lim, Duk-Gyu
    • Convergence Security Journal
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    • v.17 no.2
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    • pp.15-22
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    • 2017
  • This paper presents new 8-bit implementation of AES. Most typical 8-bit AES designs are to reduce the circuit area by sacrificing its throughput. The presented AES architecture employs two separated S-box to perform round operation and key generation in parallel. From the simulation results of the proposed AES-128, the maximum critical path delay is 13.0ns. It can be operated in 77MHz and the throughput is 15.2 Mbps. Consequently, the throughput of the proposed AES has 1.54 times higher throughput than the other counterpart although the area increasement is limited in 1.17 times. The proposed AES design enables very low-area design without sacrificing its performance. Thereby, it can be suitable for the various IoT applications that need high speed communication.

Accuracy Enhancement Technique in the Current-Attenuator Circuit (전류 감쇠 조정 회로에서의 정밀도 향상 기술)

  • Kim, Seong-Kweon
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.8
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    • pp.116-121
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    • 2005
  • To realize the tap coefficient of a finite impulse response(FIR) filter or the twiddle factor of a fast Fourier transform(FFT) using a current-mode analog circuit, a high accurate current-attenuator circuit is needed This paper introduces an accuracy enhancement technique in the current-mode signal processing. First of all, the DC of set-current error in a conventional current-attenuator using a gate-ratioed orient mirror circuit is analyzed and then, the current-attenuator circuit with a negligibly small DC offset-current error is introduced. The circuit consists of N-output current mirrors connected in parallel with me another. The output current of the circuit is attenuated to 1/N of the input current. On the basis of the Kirchhoff current law, the current scale ratio is determined simply by the number of the current mirrors in the N-current mirrors connected in parallel. In the proposed current-attenuator circuit the scale accuracy is limited by the ac gain error of the current mirror. Considering that a current mirror has a negligibly small ac gain error, the attainable maximum scale accuracy is theoretically -80[dB] to the input current.

Quality of Coverage Analysis on Distributed Stochastic Steady-State Simulations (분산 시뮬레이션에서의 Coverage 분석에 관한 연구)

  • Lee, Jong-Suk-R.;Park, Hyoung-Woo;Jeong, Hae-Duck-J.
    • The KIPS Transactions:PartA
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    • v.9A no.4
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    • pp.519-524
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    • 2002
  • In this paper we study the qualify of sequential coverage analysis under a scenario of distributed stochastic simulation known as MRIP(Multiple Replications In Parallel) in terms of the confidence intervals of coverage and the speedup. The estimator based in the F-distribution was applied to the sequential coverage analysis of steady-state means. in simulations of the $M/M/1/{\infty},\;M/D/I/{\infty}\;and\;M/H_{2}/1/{\infty}$ queueing systems on a single processor and multiple processors. By using multiple processors under the MRIP scenario, the time for collecting many replications needed in sequential coverage analysis is reduced. One can also easily collect more replications by executing it in distributed computers or clusters linked by a local area network.

An Adaptive Task Allocation Scheme in a Java Parallel Processing System based on the WWW (WWW기반 자바 병렬 처리 시스템에서 적응적 태스크 할당 기법)

  • 최광희;한연희;정영식;황종선
    • Proceedings of the Korean Information Science Society Conference
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    • 1998.10a
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    • pp.706-708
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    • 1998
  • WWW에서 의뢰인- 병렬처리 서버- 작업자 구성을 이용하여, 작업자 애플릿을 임의의 호스트에 분산시키고, 대량의 연산수행을 지닌 작업을 배분하여 수행시킨 뒤, 그 결과를 의뢰인에게 보여주는 WWW 기반 자바병렬 시스템이 기존의 LAN상에서의 병렬 시스템보다 확장성 및 이용 용이성 면에서 크게 주목을 끌고 있다. 이러한 WWW 기반 자바 병렬 처리 시스템에서 서버가 주어진 태스크들을 작업자들에게 할당하는 효율적인 기법이 크게 요구된다. 본 논문에서는, 이미 구현된 WWW 기반 자바 병렬 시스템 원형(prototype)에서 효율적인 적응적 태스크 할당 기법을 제시한다. 제안하는 적응적 태스크 할당 기법이 WWW에서 여러 호스트들의 성능이 시간의 흐름에 따라 크게 변화하는 상황에 크게 이점이 있음을 성능 분석 및 평가를 통해 보여준다.

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Comparison of Interconnection Networks for Message Passing Parallel Processing Systems (메시지 패싱 병렬 처리 시스템의 상호연결망 비교)

  • 한종석;심원세한우종
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.463-466
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    • 1998
  • 본 논문에서는 메시지 패싱 전송을 기반으로 하는 병렬 처리 시스템의 상호연결망 구조와 특성을 조사하고 비교한다. 특히, 상용 시장에서 널리 알려진 대표적인 병렬 처리 시스템의 상호연결망 특성과 ETRI에서 개발된 고속 병렬 컴퓨터(SPAX)의 계층 크로스바 상호 연결망(Xcent-Net) 특성을 상호 비교한다. 메시지 패싱 전송 기반의 상호연결망은 일반적으로 확장성이 우수하여 대규모 병렬 처리 시스템을 구축하는데 유리하다. Cray T3E 시스템, Intel ASCI TFLOPS 시스템, Tandem Himalaya S70000 시스템, IBM RS6000 SP2 시스템등은 메시지 패싱 상호연결망을 기반으로 수백개에서 수천개의 대규모 프로세서를 연결한 병렬 처리 시스템이다. ETRI SPAX 시스템은 Xcent-Net 메시지 패싱 상호연결망을 기반으로 최대 256개 프로세서를 연결한 고속 병렬 처리 시스템으로 우수한 확장성과 높은 성능을 제공한다. 본 논문에서는 상호연결망의 구조와 함께 라우팅 스위치 구조 및 특성을 중심으로 전송 지연시간, 그리고 노드당 전송 대역폭 특성을 비교한다.

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Differential Evolution Algorithm using Parallel Processing Structure (병렬 처리 구조를 이용한 차분 진화 알고리즘)

  • Lim, Dong-Hyun;Lee, Jong-Hyun;Ahn, Chang-Wook
    • Proceedings of the Korean Information Science Society Conference
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    • 2010.06c
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    • pp.323-327
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    • 2010
  • 본 논문은 차분 진화 알고리즘의 최적해 탐색 능력을 향상시키기 위해 병렬 처리기법을 적용한 기법을 제안한다. 이를 위해서 기존의 개체군들을 5개의 그룹으로 나누어서 독립적으로 최적화 과정을 하도록 하여 일정한 확률에 의해서 각 그룹이 다른 그룹의 Best individual들을 변이 과정에서 참조하도록 하였다. 이러한 방식을 통해서 기존 차분 진화 알고리즘이 가지고 있는 지역해 수렴 문제를 해결하는 할 수 있도록 하였다. 실험을 통해서 제안된 차분 진화 알고리즘(P-DE)의 탐색 능력을 비교 및 분석 하였다. 실험 결과 제안된 차분 진화 알고리즘(P-DE)이 지역해 수렴 문제를 충분히 해결함으로써 기존의 알고리즘에 비해서 우수한 성능을 보이는 것을 확인 하였다.

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A Program Restructuring framework for Parallel Processing (병렬처리를 위한 프로그램 재구조화)

  • 송월봉
    • Journal of the Korea Computer Industry Society
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    • v.4 no.4
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    • pp.501-508
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    • 2003
  • In this paper A new theory of linear loop transformation called Elimination of Data Dependency(BDD) is presented. The current framework of linear loop transformation cannot identify a significant fraction of parallelism. For this reason, a method to extract the maximum loop parallelism in perfect nested loops is presented. This technique is applicable to general loop nests where the dependence include both distance and directions.

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An Application of Generic Algorithms to the Distribution System Loss Minimization Re -cofiguration Problem (배전손실 최소화 문제에 있어서 유전알고리즘의 수속특성에 관한 연구)

  • Choi, Dai-Seub;Jung, Soo-Yong
    • Proceedings of the KIEE Conference
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    • 2005.07a
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    • pp.580-582
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    • 2005
  • This paper presents a new method which applies a genetic algorithm(GA) for determining which sectionalizing switch to operate in order to solve the distribution system loss minimization re-configuration problem. The distribution system loss minimization re-configuration problem is in essence a 0-1 planning problem which means that for typical system scales the number of combinations requiring searches becomes extremely large. In order to deal with this problem, a new a roach which applies a GA was presented. Briefly, GA are a type of random number search method, however, they incorporate a multi-point search feature. Further, every point is not is not separately and respectively renewed, therefore, if parallel processing is applied, we can expect a fast solution algorithm to result.

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Acquirement of cross-sectional image by using wavelength swept laser within the two SOAs parallel configuration (병렬 SOA 구조의 파장가변 레이저를 이용한 단면 영상획득)

  • Kim, Hoon-Sup;Eom, Jin-Seob
    • Journal of Industrial Technology
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    • v.28 no.B
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    • pp.239-244
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    • 2008
  • We have realized the swept source optical coherence tomography(SS-OCT) by using the self-fabricated wavelength swept laser(wavelength tuning range : 80nm, line-width : 0.12nm, wavelength sweeping rate : 50Hz). In addition, we have used the dual balanced detector that could make a mirror image in OCT display suppressed. We can also fabricate the comb filter of Michelson interferometer type for fast-signal processing in OCT. Using this SS-OCT system for measuring an mirror, a 1mm-depth glass and an onion, we confirmed that the in vivo epidermal cross-sectional images for them can be obtained appropriately.

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Process Control Utilizing the Method of Intelligent Control (지능형 제어 기법에 의한 공정 제어)

  • Chae, Chang-Hyun;Lee, Chang-Hoon;Yim, Eun-Bin;Woo, Kwang-Bang
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.930-933
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    • 1988
  • This paper demonstrates an AI application for representing operator's heuristic knowledges in implementing process control. AI controller constitutes servo and regulatory controller, respectively. The knowledge base for servo controller was designed to obtain the process output with respect to the desired set-point in short period. The regulatory controller was to provide smooth output near the set-point. The AI controllers was implemented in Turbo-PROLOG on IBM-PC. For the parallel processing, Turbo-C was linked to calculate the process output. The result shows that this AI controller can be well suited not only for minimum phase but also for non-minimum phase. This controller may be used as a back-up controller for rather extensive expert system.

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