• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2002.07b
• /
• pp.817-820
• /
• 2002

Amorphous selenium based flat panel detectors convert incident x-ray to electric signal directly. Flat panel detectors gain more interest real time medical x-ray imaging. TFT array and electric readout circuits are used in this paper offered by LG.Philips.LCD. Detector is based on a $1536{\times}1280$ array of a-Si TFT pixels. X-ray conversion layer(a-Se) is deposited upper TFT array with a $400{\mu}m$ by thermal deposition technology. Thickness uniformity of this layer is made of thickness control system technology$({\leq}5%)$. Each $139{\mu}m{\times}139{\mu}m$ pixel is made of thin film transistor technology, a storage capacitor and collecting electrode having geometrical fill factor of 86%. This system show dynamic performance. Imaging performance is suited for digital radiography imaging substitute by conventional radiography film system.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.30 no.8
• /
• pp.479-483
• /
• 2017

The effect of $NH_3$ plasma treatment on device characteristics was confirmed for an optimized thin film transistor of poly-Si formed by ELA. When C-V curve was checked for MIS (metal-insulator-silicon), Dit of $NH_3$ plasma treated and MIS was $2.7{\times}10^{10}cm^{-2}eV^{-1}$. Also in the TFT device case, it was decreased to the sub-threshold slope of 0.5 V/decade, 1.9 V of threshold voltage and improved in $26cm^2V^{-1}S^{-1}$ of mobility. Si-N and Si-H bonding reduced dangling bonding to each interface. When gate bias stress was applied, the threshold voltage's shift value of $NH_3$ plasma treated device was 0.58 V for 1,000s, 1.14 V for 3,600s, 1.12 V for 7,200s. As we observe from this quality, electrical stability was also improved and $NH_3$ plasma treatment was considered effective for passivation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.12S
• /
• pp.1175-1180
• /
• 2003

Transformer Coupled Plasma Chemical Vapor Deposited (TCP-CVD) silicon nitride (SiNx) is widely used as a gate dielectric material for thin film transistors (TFT). This paper reports the SiNx films, grown by TCP-CVD at the low temperature (30$0^{\circ}C$). Experimental investigations were carried out for the optimization o(SiNx film as a function of $N_2$/SiH$_4$ flow ratio varying ,3 to 50 keeping rf power of 200 W, This paper presents the dielectric studies of SiNx gate in terms of deposition rate, hydrogen content, etch rate and leakage current density characteristics lot the thin film transistor applications. And also, this work investigated means to decrease the leakage current of SiNx film by employing $N_2$ plasma treatment. The insulator layers were prepared by two step process; the $N_2$ plasma treatment and then PECVD SiNx deposition with SiH$_4$, $N_2$gases.

• Korean Journal of Metals and Materials
• /
• v.47 no.5
• /
• pp.322-329
• /
• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.

• Journal of Information Display
• /
• v.1 no.1
• /
• pp.25-28
• /
• 2000

We propose a new in-situ fluorine passivation of poly-Si TFTs using excimer laser annealing to reduce the trap state density and improve reliability significantly. To investigate the effect of an in-situ fluorine passivation, we have fabricated fluorine-passivated p-channel poly-Si TFTs and examined their electrical characteristics and stability. A new in-situ fluorine passivation brought about an improvement in electrical characteristic. Such improvement is due to the formation of stronger Si-F bonds than Si-H bonds in poly-Si channel and $SiO_2$/Poly-Si interface.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2008.10a
• /
• pp.575-578
• /
• 2008

본 연구는 LCD 용 비정질 실리콘 박막 트랜지스터의 제조공정중 가장 중요한 식각 공정에서 각 박막의 특성에 맞는 습식 및 건식식각공정을 개발하여 소자의 특성을 안정시키고자 한다. 본 연구의 수소화 된 비정질 실리콘 박막 트랜지스터는 Inverted Staggered 형태로 게이트 전극이 하부에 있다. 실험 방법은 게이트전극, 절연층, 전도층, 에치스토퍼 및 포토레지스터 층을 연속 증착한다. 스토퍼층을 게이트 전극의 패턴으로 남기고, 그 위에 $n^+$a-Si:H 층 및 NPR(Negative Photo Resister)을 형성시킨다. 상부 게이트 전극과 반대의 패턴으로 NPR층을 패터닝하여 그것을 마스크로 상부 $n^+$a-Si:H 층을 식각하고, 남아있는 NPR층을 제거한다. 그 위에 Cr층을 증착한 후 패터닝하여 소오스-드레인 전극을 위한 Cr층을 형성시켜 박막 트랜지스터를 제조한다. 여기서 각 박막의 패터닝은 식각 공정으로 각 단위 박막의 특성에 맞는 건식 및 습식식각 공정이 필요하다. 제조한 박막 트랜지스터에서 가장 흔히 발생되는 문제는 주로 식각 공정시 over 및 under etching 이며, 정확한 식각을 위하여 각 박막에 맞는 식각공정을 개발하여 소자의 최적 특성을 제공하고자한다. 이와 같이 공정에 보다 엄격한 기준의 건식 및 습식식각 공정 그리고 세척 등의 처리공정을 정밀하게 실시하여 소자의 특성을 확실히 개선 할 수 있었다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2007.08a
• /
• pp.12-15
• /
• 2007

Excimer-laser-based crystallization is ideallysuited for forming crystalline Si films on glass substrates for use in active-matrix displays. In this paper, we will report on recent and significant technical advances in light sources and beam delivery systems targeted at enabling ultra-uniform mura-free low-temperature polycrystalline silicon active-matrix backplanes while simultaneously lowering production costs and increasing throughput.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.50 no.4
• /
• pp.161-168
• /
• 2001

Organic thin film transitors(TFTs) are of interest for use in broad area electronic applications. For example, in active matrix liquid crystal displays(AMLCDs), organic TFTs would allow the use of inexpensive, light-weight, flexible, and mechanically rugged plastic substrates as an alternative to the glass substrates needed for commonly used hydrogenated amorphous silicon(a-Si:H). Recently pentacene TFTs with carrier field effect, mobility as large as 2 $cm^2V^{-1}s^{-1}$ have been reported for TFTs fabricated on silicon substrates, and it is higher than that of a-Si:H. But these TFTs are fabricated on silicon wafer and $SiO_2$ was used as a gate insulator. $SiO_2$ deposition process requires a high insulator which is polyimide and photo acryl. We investigated trasfer and output characteristics of the thin film transistors having active layer of pentacene. We calculated field effect mobility and on/off ratio from transfer characteristics of pentacene thin film transistor, and measured IR absorption spectrum of polymide used as the gate dielectric layer. It was found that using the photo acryl as a gate insulator, threshold voltage decreased from -12.5 V to -7 V, field effect mobility increased from 0.012 $cm^2V^{-1}s^{-1}$ to 0.039 $cm^2V^{-1}s^{-1}$ , and on/off current ratio increased from $10^5\;to\;10^6$. It seems that TFTs using photo acryl gate insulator is apt to form channel than TFTs using polyimide gate insulator.

• Korean Journal of Metals and Materials
• /
• v.46 no.11
• /
• pp.762-769
• /
• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1999.05a
• /
• pp.589-592
• /
• 1999

This paper describes direct $\mu$C-Si/CaF$_2$/glass thin film growth by RPCVD system in a low temperature for thin film transistor (TFT), photovoltaic devices. and sensor applications. Experimental factors in a low temperature direct $\mu$ c-Si film growth are presented in terms of deposition parameters: SiH$_4$/H$_2$ ratio, chamber total pressure, substrate temperature, rf power, and CaF$_2$ buffer layer. The structural and electrical properties of the deposited films were studied by means of Raman spectroscopy, I-V, L-I-V, X-ray diffraction analysis and SEM. we obtain a crystalline volume fraction of 61%, preferential growth of (111) and (220) direction, and photosensitivity of 124. We achieved the improvement of crystallinity and electrical property by using the buffer layers of CaF$_2$ film.