• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.2
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• pp.143-150
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• 2000

Ferroelectric SrxBi2+yTa2O9+$\alpha$ thin films with various compositions(x=0.7, 0.8, 1, y=0.3, 0.4) were prepared by sol-gel method. The film with moled ratio of 0.8:2.3:2.0 in Sr/Bi/Ta, which was deposited on Pt/SiO2/Si (100), showed better ferroelectric properties than other films. To investigate substrate effects, the same compositions were spin coated on Pt/Ti/SiO2/Si (100) substrates. At an applied voltage of 5V, the dielectric constant($\varepsilon$r), remanent polarization (2Pr) and coercive field (Ec) of the Sr0.8Bi2.3Ta2O9+$\alpha$ thin film prepared on Pt/Ti/SiO2/Si (100) were about 296, 24$\mu$C/$\textrm{cm}^2$ and Ec of 49kV/cm respectively. Both SBT films firred at 80$0^{\circ}C$ revealed no fatigue up to 1010 cycles. Retention characteristics of these capacitors showed no degradation up to 104 sec.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.186-189
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• 2003

The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $ZrO_2$ and $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the $ZrO_2$ and $CeO_2$ layer. AES show no interdiffusion and the formation of amorphous $SiO_2$ layer is suppressed by using the $ZrO_2$ and $CeO_2$ film as buffer layer between the BLT film and Si substrate. The width of the memory window in the C-V curves for the $BLT/ZrO_2/Si$ and $BLT/CeO_2/Si$ structure is 2.94 V and 1.3V, respectively. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.12 no.1
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• pp.56-61
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• 1999

Highly conductive oxide films of BaRuO$_3$ have been grown heteroepitaxially on (100) LaAlO$_3$ single crystalline substrates by using pulsed laser deposition. The films are c-axis oriented with an in-plane epitaxial relationship of <010><100>BaRuO$_3$ // <110>LaAlO$_3$. Atomic force microscopy (AFM) observation shows that they consist of a fine-arranged network of grains and have a mosaic microstructure. Generally temperature-dependent resistivity shows the transition from metallic curve to semiconductor-metallic twofold curve by the deposition conditions for Ru oxide based materials like SrRuO$_3$, CaRuO$_3$, BaRuO$_3$, etc.. This twofold curve comes from the structural similarity of Ru oxide based materials including BaRuO$_3$. We find that the distance of Ru-Ru bonding in the unit cell of BaRuO$_3$ as well as the grain boundary scattering could be the two important causes of these interesting conductive properties.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.100-100
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• 2000

Aluminium oxide (Al2O3) films have been investigated for many applications such as insulating materials, hard coatings, and diffusion barriers due to their attractive electrical and mechanical properties. In recent years, application of Al2O3 films for dielectric materials in integrated circuits as gates and capacitors has attracted much attention. Various deposition techniques such as sol-gel, metalorganic decomposition (MOD), sputtering, evaporation, metalorganic chemical vapor deposition (MOCVD), and pulsed laser ablation have been used to fabricate Al2O3 thin films. Among these techniques, reactive sputtering has been widely used due to its high deposition rate and easy control of film composition. It has been also reported that the sputtered Al2O3 films exhibit superior chemical stability and mechanical strength compared to the films fabricated by other processes. In this study, Al2O3 thin films were deposited on Pt/Ti/SiO/Si2 and Si substrates by DC reactive sputtering at room temperature with variation of the Ar/O2 ratio in sputtering ambient. Crystalline phase of the reactively sputtered films was characterized using X-ray diffractometry and the surface morphology of the films was observed with Scanning election microscopy. Effects of Th Ar/O2 ratio characteristics of Al2O3 films were investigated with emphasis on the thickness dependence of the dielectric properties. Correlation between the dielectric properties and the microstructure was also studied

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.3
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• pp.135-144
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• 2003

This work proposes on-chip full CMOS current and voltage references for high-speed mixed-mode circuits. The proposed current reference circuit uses a digital-domain calibration method instead of a conventional analog calibration to obtain accurate current values. The proposed voltage reference employs internal reference voltage drivers to minimize the high-frequency noise from the output stages of high-speed mixed-mode circuits. The reference voltage drivers adopt low power op amps and small- sized on-chip capacitors for low power consumption and small chip area. The proposed references are designed, laid out, and fabricated in a 0.18 um n-well CMOS process and the active chip area is 250 um x 200 um. The measured results show the reference circuits have the power supply variation of 2.59 %/V and the temperature coefficient of 48 ppm/$^{\circ}C$ E.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1990.10a
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• pp.65-67
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• 1990

In this study, (0.80-x)Pb($Mg_{1/3}Nb_{2/3}$)$O_3$-$PbTiO_3$-Pb($Ni_\frac{1}{2}W_\frac{1}{2}$)$O_3$ 0.05$\leq$x$\leq$0.20) ceramics were fabricated by the mixed oxide method, the sintering temperature and time were 950∼1200[$^{\circ}C$], 2[hr], respectively. The dielectric and structural properties with composition and sintering temperature were investigated for the application as multilayer ceramic capacitors. Dielectric constant of 0.70PMN-0.2PT-0.10PNW composition with repeated calcination was increased rapidly. Increasing the Pb($Mg_{1/3}Nb_{2/3}$)$O_3$-$PbTiO_3$-Pb($Ni_\frac{1}{2}W_\frac{1}{2}$)$O_3$ contents from 0.05 to 0.20 [mol], phase transition temperature was shifted from 68 to 2[$^{\circ}C$] and dielectric constant was decreased while sintered density was increased. In the specimens containing 0.10, 0.15[mol] of PNW, dielectri constants at room temperature were exhibited the highest values 11199, 10114, respectively. Resistivity of specimens were $10^{10}$ ∼ $10^{12}$($\Omega$.m) and there was no dependence on sintering temperature and composition.

• Journal of Sensor Science and Technology
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• v.31 no.5
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• pp.318-323
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• 2022

Barium titanate (BaTiO₃) is considered to be a beneficial ceramic material for multilayer ceramic capacitor (MLCC) applications because of its high dielectric constant and low dielectric loss. Numerous attempts have been made to improve the physical properties of BaTiO₃ in response to recent market trends by employing multicomponent alloying strategies. However, owing to its significant number of atomic combinations and unpredictable physical properties, finding a traditional experimental approach to develop multicomponent systems is difficult; the development of such systems is also time-consuming. In this study, 168 new structures were fabricated using special quasi-random structures (SQSs) of Ba_1-xCa_xTi_1-yZryO₃, and 1680 physical properties were extracted from first-principles calculations. In addition, we built an integrated database to manage the computational results, and will provide big data solutions by performing data analysis combined with AI modeling. We believe that our research will enable the global materials market to realize digital transformation through datalization and intelligence of the material development process.

• Journal of the Korean Ceramic Society
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• v.49 no.5
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• pp.475-483
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• 2012

High capacitance X5R MLCCs based on $BaTiO_3$ ceramic dielectric layers exhibit a single broad, asymmetric arc shape impedance and modulus response over the wide frequency range between 1 MHz to 0.01 Hz. Analysis according to the conventional brick-layer model for polycrystalline conductors employing a series connection of multiple RC parallel circuits leads to parameters associated with large errors and of little physical significance. A new parametric impedance model is shown to satisfactorily describe the experimental spectra, which is a parallel network of one resistor R representing the DC conductivity thermally activated by 1.32 eV, one ideal capacitor C exactly representing bulk capacitance, and a constant phase element (CPE) Q with complex capacitance $A(i{\omega})^{{\alpha}-1}$ with ${\alpha}$ close to 2/3 and A thermally activated by 0.45 eV or ca. 1/3 of activation energy of DC conductivity. The feature strongly indicate the CK1 model by J. R. Macdonald, where the CPE with 2/3 power-law exponent represents the polarization effects originating from mobile charge carriers. The CPE term is suggested to be directly related to the trapping of the electronic charge carriers and indirectly related to the ionic defects responsible for the insulation resistance degradation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.5
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• pp.8-14
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• 2007

In this paper, $HfO_2$/Hf stacked film has been applied as the gate dielectric in MOS devices. The $HfO_2$ thin film was deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAHf and $O_3$ as precursors. Prior to the deposition of the $HfO_2$ film, a thin Hf metal layer was deposited as an intermediate layer. Round-type MOS capacitors have been fabricated on Si substrates with 2000${\AA}$-thick Al or Pt top electrode. The prepared film showed the stoichiometric components. At the $HfO_2$/Si interface, both Hf-Si and Hf-Si-O bonds were observed, instead of Si-O bond. The sandwiched Hf metal layer suppressed the growing of $SiO_x$ layer so that $HfSi_xO_y$ layer was achieved. It seems that the intermediate Hf metal layer has a benefit for the enhancement of electric characteristics of gate dielectric in $HfO_2$/Si structure.

• The Korean Journal of Ceramics
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• v.6 no.2
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• pp.138-142
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• 2000

Thin film $LiNbO_3$MFS (metal-ferroelectric-semiconductor) capacitor showed improved characteristics such as low interface trap density, low interaction with Si substrate, and large remanent polarization. This paper reports ferroelectric $LiNbO_3$thin films grown directly on p-type Si (100) substrates by 13.56 MHz RF magnetron sputtering system for FRAM (ferroelectric random access memory) applications. RTA (rapid thermal anneal) treatment was performed for as-deposited films in an oxygen atmosphere at $600^{\circ}C$ for 60sec. We learned from X-ray diffraction that the RTA treated films were changed from amorphous to poly-crystalline $LiNbO_3$which exhibited (012), (015), (022), and (023) plane. Low temperature film growth and post RTA treatments improved the leakage current of $LiNbO_3$films while keeping other properties almost as same as high substrate temperature grown samples. The leakage current density of $LiNbO_3$films decreased from $10^{-5}$ to $10^{-7}$A/$\textrm{cm}^2$ after RTA treatment. Breakdown electric field of the films exhibited higher than 500 kV/cm. C-V curves showed the clockwise hysteresis which represents ferroelectric switching characteristics. Calculated dielectric constant of thin film $LiNbO_3$illustrated as high as 27.9. From ferroelectric measurement, the remanent polarization and coercive field were achieved as 1.37 $\muC/\textrm{cm}^2$ and 170 kV/cm, respectively.