• Title/Summary/Keyword: Wafer Surface

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Enhancement of Wear and Corrosion Resistances of Monocrystalline Silicon Wafer (단결정 실리콘 웨이퍼의 내마모성 및 내식성 향상을 관한 연구)

  • Urmanov, B.;Ro, J.S.;Pyun, Y.S.;Amanov, A.
    • Tribology and Lubricants
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    • v.35 no.3
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    • pp.176-182
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    • 2019
  • The primary objective of this study is to treat a monocrystalline silicon (Si) wafer having a thickness of $279{\mu}m$ by employing the ultrasonic nanocrystal surface modification (UNSM) technology for improving the efficiency and service life of nano-electromechanical systems (NEMSs) and micro-electromechanical systems (MEMSs) by enhancing of wear and corrosion resistances. The wear and corrosion resistances of the Si wafer were systematically investigated before and after UNSM treatment, wherein abrasive, oxidative and spalling wear mechanisms were applied to the as-received and subsequently UNSM-treated Si wafer. Compared to the asreceived state, the wear and corrosion resistances of the UNSM-treated Si wafer are found to be enhanced by about 23% and 14%, respectively. The enhancement in wear and corrosion resistances after UNSM treatment may be attributed to grain size refinement (confirmed by Raman spectroscopy) and modified surface integrity. Furthermore, it is observed that the Raman intensity reduced significantly after UNSM treatment, whereas neither the Raman shift nor new phases were found on the surface of the UNSM-treated Si wafer. In addition, the friction coefficient values of the as-received and UNSM-treated Si wafers are found to be about 0.54 and 0.39, respectively. Hence, UNSM technology can be effectively incorporated as an alternative mechanical surface treatment for NEMSs and MEMSs comprising Si wafers.

Numerical Study on Wafer Temperature Considering Gap between Wafer and Substrate in a Planetary Reactor (Planetary 형 반응기에서 웨이퍼와 기판 사이의 틈새가 웨이퍼 온도에 미치는 영향에 대한 연구)

  • Ramadan, Zaher;Jung, Jongwan;Im, Ik-Tae
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.3
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    • pp.1-7
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    • 2017
  • Multi-wafer planetary type chemical vapor deposition reactors are widely used in thin film growth and suitable for large scale production because of the high degree of growth rate uniformity and process reproducibility. In this study, a two-dimensional model for estimating the effect of the gap between satellite and wafer on the wafer surface temperature distribution is developed and analyzed using computational fluid dynamics technique. The simulation results are compared with the results obtained from an analytical method. The simulation results show that a drop in the temperature is noticed in the center of the wafer, the temperature difference between the center and wafer edges is about $5{\sim}7^{\circ}C$ for all different ranges of the gap, and the temperature of the wafer surface decreases when the size of the gap increases. The simulation results show a good agreement with the analytical ones which is based on one-dimensional heat conduction model.

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The Effect of Hydrogen Plasma on Surface Roughness and Activation in SOI Wafer Fabrication

  • Park, Woo-Beom;Kang, Ho-Cheol;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.1 no.1
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    • pp.6-11
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    • 2000
  • The hydrogen plasma treatment of silicon wafers in the reactive ion-etching mode was studied for the application to silicon-on-insulator wafers which were prepared using the wafer bonding technique. The chemical reactions of hydrogen plasma with surface were used for both surface activation and removal of surface contaminants. As a result of exposure of silicon wafers to the plasma, an active oxide layer was found on the surface. This layer was rendered hydrophilic. The surface roughness and morphology were examined as functions of the plasma exposing time and power. In addition, the surface became smoother with the shorter plasma exposing time and power. The value of initial surface energy estimated by the crack propagation method was 506 mJ/㎡, which was up to about three times higher as compared to the case of conventional direct using the wet RCA cleaning method.

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Effect of surface toughness on the interfacial adhesion energy between glass wafer and UV curable polymer for different surface roughness (표면거칠기에 따른 글래스 웨이퍼와 UV 경화 폴리머사이의 계면접착 에너지 평가)

  • Jang, Eun-Jung;Hyun, Seoung-Min;Choi, Dae-Geun;Lee, Hak-Joo;Park, Young-Bae
    • Proceedings of the KSME Conference
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    • 2008.11a
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    • pp.40-44
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    • 2008
  • The interfacial adhesion energy between resist and a substrate is very important due to resist pull-off problems during separation of mold from a substrate in nanoimprint process. And effect of substrate surface roughness on interfacial adhesion energy is very important. In this paper, we have treated glass wafer surface using $CF_4$ gas for increase surface roughness and it has tested interfacial adhesion properties of UV resin/glass substrate interfaces by 4 point bending test. The interfacial adhesion energies by bare, 30, 60 and 90 sec surface treatments are 0.62, 1.4, 1.36 and 2 $J/m^2$, respectively. The test results showed quantitative comparisons of interfacial fracture energy (G) effect of glass wafer surface roughness.

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A New Method of Noncontact Measurement for 3D Microtopography in Semiconductor Wafer Implementing a New Optical Probe based on the Precision Defocus Measurement (비초점 정밀 계측 방식에 의한 새로운 광학 프로브를 이용한 반도체 웨이퍼의 삼차원 미소형상 측정 기술)

  • 박희재;안우정
    • Journal of the Korean Society for Precision Engineering
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    • v.17 no.1
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    • pp.129-137
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    • 2000
  • In this paper, a new method of noncontact measurement has been developed for a 3 dimensional topography in semiconductor wafer, implementing a new optical probe based on the precision defocus measurement. The developed technique consists of the new optical probe, precision stages, and the measurement/control system. The basic principle of the technique is to use the reflected slit beam from the specimen surface, and to measure the deviation of the specimen surface. The defocusing distance can be measured by the reflected slit beam, where the defocused image is measured by the proposed optical probe, giving very high resolution. The distance measuring formula has been proposed for the developed probe, using the laws of geometric optics. The precision calibration technique has been applied, giving about 10 nanometer resolution and 72 nanometer of four sigma uncertainty. In order to quantitize the micro pattern in the specimen surface, some efficient analysis algorithms have been developed to analyse the 3D topography pattern and some parameters of the surface. The developed system has been successfully applied to measure the wafer surface, demonstrating the line scanning feature and excellent 3 dimensional measurement capability.

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Study of the Diffusion of Phosphorus Dependent on Temperatures for Selective Emitter Doping Process of Atmospheric Pressure Plasma (대기압 플라즈마의 선택적 도핑 공정에서 온도에 의한 인(Phosphorus)의 확산연구)

  • Kim, Sang Hun;Yun, Myoung Soo;Park, Jong In;Koo, Je Huan;Kim, In Tae;Choi, Eun Ha;Cho, Guangsup;Kwon, Gi-Chung
    • Journal of the Korean institute of surface engineering
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    • v.47 no.5
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    • pp.227-232
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    • 2014
  • In this study, we propose the application of doping process technology for atmospheric pressure plasma. The plasma treatment means the wafer is warmed via resistance heating from current paths. These paths are induced by the surface charge density in the presence of illuminating Argon atmospheric plasmas. Furthermore, it is investigated on the high-concentration doping to a selective partial region in P type solar cell wafer. It is identified that diffusion of impurities is related to the wafer temperature. For the fixed plasma treatment time, plasma currents were set with 40, 70, 120 mA. For the processing time, IR(Infra-Red) images are analyzed via a camera dependent on the temperature of the P type wafer. Phosphorus concentrations are also analyzed through SIMS profiles from doped wafer. According to the analysis for doping process, as applied plasma currents increase, so the doping depth becomes deeper. As the junction depth is deeper, so the surface resistance is to be lowered. In addition, the surface charge density has a tendency inversely proportional to the initial phosphorus concentration. Overall, when the plasma current increases, then it becomes higher temperatures in wafer. It is shown that the diffusion of the impurity is critically dependent on the temperature of wafers.

Wafer Packing Box for Vibration Suppression Material Optimization (진동 억제를 위한 Wafer Packing Box 재료 최적화)

  • Yoon, Jae-Hoon;Hur, Jang-Wook;Yi, Il-Hwan
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.2
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    • pp.51-56
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    • 2022
  • Recently, the demand for semiconductors is expanded to various industries, and the use of high-quality and high-performance chips is increasing. With the trend, the diameter magnification and high integration of the semiconductor wafers are mandatory. As a result, there is a growing demand for the productivity improvement and the surface precision. There have been many studies on the stabilization of the wafer manufacturing processes in order to satisfy those specifications. Many complaints have been appealed by the wafer buyers that there are many unacceptable wafers with surface defects and foreign material adhesion which are caused by the vibrations during transportation. This study intends to derive the material improvement of the packing box of the wafers to suppress the vibrations of the box, and eventually to reduce the surface defects and the foreign material adhesion. The result shows that optimal material can substantially decrease the vibration of the packing box.

A Study on the Micro-lapping process of Sapphire Wafers for optoelectronic devices (광반도체용 사파이어웨이퍼 기계연마특성 연구)

  • 황성원;신귀수;김근주;서남섭
    • Journal of the Korean Society for Precision Engineering
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    • v.21 no.2
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    • pp.218-223
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    • 2004
  • The sapphire wafers for blue light emitting devices were manufactured by the implementation of the surface machining technology based on micro-tribology. This process has been performed by Micro-lapping process. The sapphire crystalline wafers were characterized by double crystal X-ray diffraction. The sample quality of crystalline sapphire wafer at surface has a full width at half maximum of 250 arcsec. This value at the surface sapphire wafer surfaces indicated 0.12${mu}m$ sizes. Surfaces of sapphire wafers were mechanically affected by residual stress and surface default. As a result, the value of surface roughness of sapphire wafers measured by AFM(Atom Force Microscope) was 2.1nm.

SiC Contaminations in Polycrystalline-Silicon Wafer Directly Grown from Si Melt for Photovoltaic Applications (실리콘 용탕으로부터 직접 제조된 태양광용 다결정 실리콘의 SiC 오염 연구)

  • Lee, Ye-Neung;Jang, Bo-Yun;Lee, Jin-Seok;Kim, Joon-Soo;Ahn, Young-Soo;Yoon, Woo-Young
    • Journal of Korea Foundry Society
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    • v.33 no.2
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    • pp.69-74
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    • 2013
  • Silicon (Si) wafer was grown by using direct growth from Si melt and contaminations of wafer during the process were investigated. In our process, BN was coated inside of all graphite parts including crucible in system to prevent carbon contamination. In addition, coated BN layer enhance the wettability, which ensures the favorable shape of grown wafer by proper flow of Si melt in casting mold. As a result, polycrystalline silicon wafer with dimension of $156{\times}156$ mm and thickness of $300{\pm}20$ um was successively obtained. There were, however, severe contaminations such as BN and SiC on surface of the as-grown wafer. While BN powders were easily removed by brushing surface, SiC could not be eliminated. As a result of BN analysis, C source for SiC was from binder contained in BN slurry. Therefore, to eliminate those C sources, additional flushing process was carried out before Si was melted. By adding 3-times flushing processes, SiC was not detected on the surface of as-grown Si wafer. Polycrystalline Si wafer directly grown from Si melt in this study can be applied for the cost-effective Si solar cells.