• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2005.07a
• /
• pp.38-39
• /
• 2005

We have investigated the effect of the pad surface characteristics such as roughness, groove density and wear of pad on within wafer non-uniformity(WIWNU) in chemical mechanical polishing(CMP). We found that WIWNU increases as pad surface roughness($R_{pk}$; Reduced peak height) increases in an early stage of polishing. But after polishing time goes to a certain extent, WIWNU decreases as uniformity of pad surface roughness. Also, groove of pad has effect on relative pad stiffness although original mechanical properties of pad are unchanged by grooving. WIWNU decreases as relative pad stiffness decreases. In addition, conditioning process causes non-uniform wear of pad during in CMP. The profile of pad wear has a significant effect on WIWNU.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.5 no.3
• /
• pp.9-24
• /
• 1968

This report is concerned with the optimum design of hyper-aprupt p-n junctiea silion diode and fabriction of this diode usable for electrical tuning application. Impurity profile in the junction was assumed to clean exponential function. With this assunntion, an optimum criterion for designing standard AM radio tuning capacitor was derived. In the diffusion process, after aluminum and antimony as impurties were deposited in vacuum on a P-type silicon wafer, the diffusion was followed by loading the wafer into the high temperature furnace.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.177-177
• /
• 2010

본 연구에서는 반도체용 Si wafer에 마스크 공정 및 slit etching 공정을 적용하여 목표인 30um 이하의 Probe unit을 개발하기 위해 Deep Si Etching(DRIE) 장비를 이용하여 식각 공정에 따른 특성을 평가하였다. 마스크는 Probe block 조립에 적합한 패턴으로 설계 하였으며, slit의 에칭된 지점에 pin이 삽입될 수 있도록 그 폭을 최소한으로 설계하였다. 30um pitch와 20um pitch의 마스크를 각각 설계하여 포토공정에 의해 마스크패턴을 제작하였으며, 식각공정 결과 식각율 5um/min, profile angle $89^{\circ}{\pm}1^{\circ}$로 400um wafer의 양면관통 식각을 확인하였으며, 표면 및 단면 식각특성을 조사하였다.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2003.06a
• /
• pp.1701-1704
• /
• 2003

This paper presents a new optimization technique of acceleration curve for a wafer transfer crane movement in which high speed and low vibration are desirable. This technique is based on a genetic algorithm with a penalty function for acceleration optimization under the assumption that an initial profile of acceleration curves constitutes the first generation of the genetic algorithm. Especially the penalty function consists of the violation of constraints and the number of violated constraints. The proposed penalty function makes the convergence rate of optimization process using the genetic algorithm more faster than the case of genetic algorithm without a penalty function. The optimized acceleration of the crane through the genetic algorithm and commercial dynamic analysis software has shown to have accurate movement and low vibration.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
• /
• 1999.10a
• /
• pp.525-529
• /
• 1999

A cone shape drum polisher was developed to make up for the demerits of conventional CMP apparatus. The developed equipment has several superiorities. First of all, it can achieve uniform velocity profile on all the contact line because of its shape and easy to control the amount of slurry at the position of use. The whole area of wafer surface is exposed to the visual area except the contact line between wafer and drum, hence we can detect polishing end point more easily than any other polishing equipments. Also it has additional merits such as small foot print and polishing load. Polishing characteristics were investigated by developed equipment.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.08a
• /
• pp.149-149
• /
• 2010

The origin of the inhomogeneous distribution of photoluminescence (PL) peak wavelength on a commercial 2" GaN wafer for green light emitting diode has been investigated by wide momentum transfer (Q) range x-ray diffraction (XRD) profile of InGaN/GaN multiple quantum wells. Near the GaN (0004) Bragg peak, wide-Q range XRD (${\Delta}Q$ > $1.4{\AA}-1$) was measured along the growth direction. Wide-Q XRD gives precise and direct information of ultra-thin InGaN quantum well structure. Based on the QW structural information, the variation of PL spectra can be explained by the combined effect of temperature gradient and slightly uneven flow of atomic sources during the QW growth. In narrow variations of indium composition and thickness of QW, an effective indium composition can be a good character to match structural data to PL spectra.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.604-604
• /
• 2012

기존의 실리콘 이종접합 태양전지는 후면에도 passivation layer인 i-a-Si:H 및 BSF층인 n-a-Si:H가 형성되는 구조를 가지고 있었다. 이러한 구조를 대체하기 위하여 본 연구에서는 실리콘 이종접합 태양전지의 후면 구조에 passivation 층 및 BSF층을 novel material인 Sb증착 및 RTP, laser anneal을 통해 새로운 BSF층 형성하고 태양전지 특성에 대해서 분석하였다. 이를 위해서 carrier lifetime, LIV, DIV 및 QE 등 전기적, 광학적 분석뿐만 아니라 SIMS 분석을 통하여 laser annealing 공정으로 형성된 BSF층의 depth profile 분석도 진행하였다. 또한 wafer orientation에 따른 특성을 분석하기 위하여 (100) 및 (111) wafer를 이용하여 분석하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.118-119
• /
• 2009

This paper presents the feature profile evolution silicon deep trench etching, which is very crucial for the commercial wafer process application. The silicon deep trenches were etched with the SF6 gas & Hbr gas based process recipe. The optimized silicon deep trench process resulted in vertical profiles (87o~90o) with loading effect of < 1%. The process recipes were developed for the silicon deep trench etching applications. This scheme provides vertically profiles without notching of top corner was observed. In this study, the production of SF6 gas based silicon deep trench etch process much more strongly than expected on the basis of Hbr gas trench process that have been investigated by scanning electron microscope (SEM). Based on the test results, it is concluded that the silicon deep trench etching shows the sufficient profile for practical MOS FET silicon deep trench technology process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.58-58
• /
• 2009

Uniformity related issues in chemical mechanical polishing (CMP) are within wafer non-uniformity (WIWNU), wafer to wafer non-uniformity (WTWNU), planarity and dishing/erosion. Here, the WIWNU that originates from spatial distribution of independent variables such as temperature, sliding distance, down force and material removal rate (MRR) during CMP, relies to spatial dependency. Among various sources of spatial irregularity, hardness and modulus of pad and surface roughness in sources for pad uniformity are great, especially. So, we investigated the spatial variation of pad surface characteristics using pad measuring system (PMS) and roughness measuring system. Reduced peak height ($R_{pk}$) of roughness parameter shows a strong correlation with the removal rate, and the distribution of relative sliding distance onwafer during polishing has an effect on the variation of $R_{pk}$ and WIWNU. Also, the results of pad wear profile thorough developed pad profiler well coincides with the kinematical simulation of conditioning, and it can contribute for the enhancement of WIWNU in CMP process.

• Journal of the Microelectronics and Packaging Society
• /
• v.15 no.2
• /
• pp.29-36
• /
• 2008

In this paper, mechanical reliability issues of copper through-wafer interconnections are investigated numerically and experimentally. A hermetic wafer level packaging for MEMS devices is developed. Au-Sn eutectic bonding technology is used to achieve hermetic sealing, and the vertical through-hole via filled with electroplated copper for the electrical connection is also used. The MEMS package has the size of $1mm{\times}1mm{\times}700{\mu}m$. The robustness of the package is confirmed by several reliability tests. Several factors which could induce via hole cracking failure are investigated such as thermal expansion mismatch, via etch profile, and copper diffusion phenomenon. Alternative electroplating process is suggested for preventing Cu diffusion and increasing the adhesion performance of the electroplating process. After implementing several improvements, reliability tests were performed, and via hole cracking as well as significant changes in the shear strength were not observed. Helium leak testing indicated that the leak rate of the package meets the requirements of MIL-STD-883F specification.