• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.233-236
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• 2000

A new time-to-digital converter is designed and the converter is based on a voltage-to-frequency converter and a counter. The converter output is obtained without delay time and the resolution improves with increasing input time interval because the output of voltage-to-frequency converter increases linearly. In the designed circuit the input time intervals range is from 100nsec to 3${\mu}$ sec.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1833-1842
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• 2016

In grid-connected converter control, grid voltage feedforward is usually introduced to suppress the influence of grid voltage distortion on the converter's grid-side AC current. However, owing to the time-delay in control systems, the suppression effect of the grid voltage distortion is seriously affected. In this paper, the positive effects of the grid voltage feedforward control are analyzed in detail, and the time-delay caused by the low-pass filter (LPF) in the voltage filtering circuits and digital control are summarized. In order to reduce the time-delay effect on the performance of the feedforward control, a voltage feedforward control strategy with time-delay compensation is proposed, in which, a leading correction of the feedforward voltage is used. The optimal leading step used in this strategy is derived from analyzing the phase-frequency characteristics of a LPF and the implementation of digital control. By using the optimal leading step, the delay in the feedforward path can be further counteracted so that the performance of the feedforward control in terms of suppressing the influence of grid voltage distortion on the converter output current can be improved. The validity of the proposed method is verified through simulation and experiment results.

• Journal of Semiconductor Engineering
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• v.3 no.1
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• pp.154-160
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• 2022

In this paper, we design a DC-DC boost converter with RF noise immunity to supply a stable positive output voltage for OLED displays. For RF noise immunity, an input voltage variation reduction circuit (IVVRC) is adopted to ensure display quality by reducing the undershoot and overshoot of output voltage. The boost converter for a positive voltage Vpos operates in the SPWM-PWM dual mode and has a dead-time controller using a dead-time detector, resulting in increased power efficiency. A chip was fabricated using a 0.18 um BCDMOS process. Measurement results show that power efficiency is 30% ~ 76% for load current range from 1 mA to 100 mA. The boost converter with the IVVRC has an overshoot of 6 mV and undershoot of 4 mV compared to a boost converter without that circuit with 18 mV and 20 mV, respectively.

• Journal of Power Electronics
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• v.15 no.1
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• pp.10-17
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• 2015

A quasi-constant on-time controlled buck front end in combined discontinuous conduction mode and boundary conduction mode is proposed to improve power factor (PF).When instantaneous AC input voltage is lower than the output bus voltage per period, the buck converter turns into buck-boost converter with the addition of a level comparator to compare input voltage and output voltage. The gate drive voltage is provided by an additional oscillator during distortion time to eliminate the cross-over distortion of the input current. This high PF comes from the avoidance of the input current distortion, thereby enabling energy to be delivered constantly. This paper presents a series analysis of controlling techniques and efficiency, PF, and total harmonic distortion. A comparison in terms of efficiency and PF between the proposed converter and a previous work is performed. The specifications of the converter include the following: input AC voltage is from 90V to 264V, output DC voltage is 80V, and output power is 94W.This converter can achieve PF of 98.74% and efficiency of 97.21% in 220V AC input voltage process.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.1
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• pp.66-69
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• 2019

This study proposes a high-efficiency phase-shifted full-bridge (PSFB) converter with a wide input voltage range. The conventional PSFB converter is a useful topology in high-power applications. This converter not only achieves the zero-voltage switching of the primary switches, but also has small RMS current in the primary side. However, because the conventional PSFB converter has large freewheeling current in the primary side when it is designed considering the hold-up time of the converter, such a converter has high conduction loss at the primary switches. To solve this problem, a new PSFB converter is proposed in this study. The experiment is implemented with an input voltage ranging from a 320 V-400 V and an output power specification of 715 W.

• Journal of Power Electronics
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• v.18 no.4
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• pp.975-984
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• 2018

This work presents a high efficiency phase shifted full bridge (PSFB) DC-DC converter for use in the second stage of a battery charger for neighborhood electrical vehicle (EV) applications. In the design of the converter, Lithium-ion battery cells are preferred due to their high voltage and current rates, which provide a high power density. This requires wide range output voltage regulation for PSFB converter operation. In addition, the battery charger works with a light load when the battery charge voltage reaches its maximum value. The soft switching of the PSFB converter depends on the dead time optimization and load condition. As a result, the converter has to work with soft switching at a wide range output voltage and under light conditions to reach high efficiency. The operation principles of the PSFB converter for the continuous current mode (CCM) and the discontinuous current mode (DCM) are defined. The performance of the PSFB converter is analyzed in detail based on wide range output voltage and load conditions in terms of high efficiency. In order to validate performance analysis, a prototype is built with 42-54 V / 15 A output values at a 200 kHz switching frequency. The measured maximum efficiency values are obtained as 94.4% and 76.6% at full and at 2% load conditions, respectively.

• International Journal of Control, Automation, and Systems
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• v.6 no.5
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• pp.670-676
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• 2008

While the matrix converter has many advantages that include bi-directional power flow, a size reduction, a long lifetime, and sinusoidal input currents, it is vulnerable to the input voltage disturbances, because it directly exchanges the input voltage to the output voltage. So, in this paper, a critical evaluation of the effect of various abnormal voltage conditions like unbalanced power supply, balanced non-sinusoidal power supply, input voltage sags and short time blackout of power supply on matrix converter fed induction motor drives is presented. The operation under various abnormal conditions has been analyzed. For this, a 230V, 250VA three phase to three phase matrix converter (MC) fed induction motor drive prototype is implemented using DSP based controller and tests have been carried out to evaluate and improve the stability of system under typical abnormal conditions. Digital storage oscilloscope & power quality analyzer are used for experimental observations.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.2
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• pp.167-174
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• 2015

This study describes how digital time delay deteriorates control performance in zero voltage switching (ZVS) phase-shifted full bridge (PSFB) converter. The small-signal model of the ZVS PSFB converter is derived from the buck-converter small-signal model. Digital time delay effects have been considered according to the digital sampling methods. The analysis verifies that digital time delays reduce the stability margin of the converter, and the double sampling technique exhibits better performance than the single sampling technique. Both simulation and experimental results based on 250 W ZVS PSFB confirm the validity of the analyses performed in the study.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.9
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• pp.96-102
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• 2015

This paper presents battery charging method using 3-phase AC-DC boost converter. General battery charging method is that charging the battery voltage to the reference voltage according to the constant current(CC) control, when it reaches the reference voltage, charging the battery fully according to the constant voltage(CV) control. However, battery chaging time is increased because of the battery impedance, constant current charging section which shoud take the large amount of charge is narrow, and constant voltage charging section which can generate insufficient charge is widen. To improve this problem, we proposes the method to reduce the charging time according to the SOC(State of Charge) estimation using battery impedance.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.692-695
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• 1999

A new control scheme is proposed suitable for the three phase PWM converter having abrupt load variation such as a crane. In the converter used in a crane, the peak value of source voltage varies instantaneously due to the abrupt load variations. Such a voltage variation degrades the performance of DC-link control of PWM converter. To overcome this problem, load variations should be detected and compensated properly. We propose a new method for detecting and compensating the load variations without the additional hardware. With the proposed scheme, load variations are detected by estimating the current of DC-link capacitor. The estimated current information is feedbacked to a current controller to improve the performance. Additionally, the variation of source voltage is compensated using feedforward controller. The performance of the proposed scheme has been verified through simulations.