• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.9
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• pp.780-786
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• 2007

This paper describes the influence on partial discharge characteristics of defects at the model XLPE/EPDM interfaces of power cable joints. The defects of void and copper which could inadvertently be present at the joint interface. We measured ${\Phi}-n,\;{\Phi}-q$ patterns by a computer-aided partial discharge measuring system. Several parameters i, e, maximum discharge $q_{max}$ [pC], average discharge q [pC/cycle], and average angle of discharge ${\Theta}g$ [deg] were found to depend upon the defect type varying applied voltage. As the result of time evaluation, partial discharges are small different at copper defects, but is decreasing obviously about 20 minutes at void defect. It considered that difference of magnitude of total positive discharge of Q+ [pC] and total negative discharge of Q- [pC] is SPMD(swarming pulsive micro discharges).

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.37-42
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• 2007

Copper deposition studies have been actively studied since interests on 3D SiP were increased. The defects inside via can be easily formed due to the current density differences on entrance, bottom and wall of via. So far many different additives and current types were discussed and optimized to obtain void-free copper via filling. In this research acid cupric sulfate plating bath containing additives such as PEG, SPS, JGB, PEI and wave current applied electroplating were examined. The size and shape of grain were influenced by the types of organic additives. The cross section of specimen were analyzed by FESEM. When PEI was added, the denser copper deposits were obtained. Electroplaing time was reduced when 2 step via filling was employed.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.2
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• pp.55-59
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• 2012

Defects such as voids or seams are frequently found in TSV via filling process. To achieve defect-free copper via filling, organic additives such as suppressor, accelerator and leveler were necessary in a copper plating bath. However, by-products stemming from the breakdown of these organic additives reduce the lifetime of the devices and plating solutions. In this research, the effects of levelers on copper electrodeposition were investigated without suppressor and accelerator to lower the concentration of additives. Threelevelers(janus green B, methylene violet, diazine black) were investigated to study the effects of levelers on copper deposition. Electrochemical behaviors of these levelers were different in terms of deposition rate. Filling performances were analyzed by cross sectional images and its characteristics were different with variations of levelers.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.102-102
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• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).