• 대한전기학회:학술대회논문집
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• 대한전기학회 1984년도 하계학술회의논문집
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• pp.92-95
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• 1984

This paper describes a general method for the design of variable structure Model-Following Control systems (VSMFC). This design concept is developed using the theory of variable structure systems and slide mode. The feasibility and the advantages of the method are illustrated by applying it to a 1000 MWe Boiling Water Reactor. The control is studied in the range of 85 - 90 % of rated power for load-following control. A set of 12 nonlinear differential eq. are used to simulate the total plant. A 6th order linear model has been developed from these equations at 85% of rated power. The obtained controller is shown by simulations to be able to compensate for a plant parameter variation over a wide power range.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.759-762
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• 2002

In this paper, a voltage-controlled linear variable resistor (VCLVR) using a floating-gate MOS-FET (FG-MOSFET) is proposed. The proposed-circuit is the grounded VCLVR consists of only an ordinary MOSFET and an FG-MOSFET. The advantage of the proposed VCLVR are low-voltage and wide-input range. Next, as applications, a floating-node voltage controlled variable resistor and an operational transconductance amplifier using the proposed VCLVRs are proposed. The performance of the proposed circuits are characterized through HSPICE simulations with a standard 0.6 ${\mu}$m CMOS process. simulations of the proposed VCLVR demonstrate a resistance value of 40 k$\Omega$ to 338 k$\Omega$ and a THD of less than 1.1 %.

• 한국신뢰성학회:학술대회논문집
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• 한국신뢰성학회 2000년도 춘계학술대회 발표논문집
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• pp.213-222
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• 2000

In present study, a stochastic model is developed for the low cycle fatigue life prediction and reliability assessment of 316L stainless steel under variable multiaxial loading. In the proposed model, fatigue phenomenon is considered as a Markov process, and damage vector and reliability are defined on every plane. Any low cycle fatigue damage evaluating method can be included in the proposed model. The model enables calculation of statistical reliability and crack initiation direction under variable multiaxial loading, which are generally not available. In present study, a critical plane method proposed by Kandil et al., maximum tensile strain range, and von Mises equivalent strain range are used to calculate fatigue damage. When the critical plane method is chosen, the effect of multiple critical planes is also included in the proposed model. Maximum tensile strain and von Mises strain methods are used for the demonstration of the generality of the proposed model. The material properties and the stochastic model parameters are obtained from uniaxial tests only. The stochastic model made of the parameters obtained from the uniaxial tests is applied to the life prediction and reliability assessment of 316L stainless steel under variable multiaxial loading. The predicted results show good accordance with experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권4호
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• pp.336-343
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• 2011

This paper introduces a simple variable gain amplifier (VGA) structure that shows an inherently dB-linear gain control property. Requiring no additional components for dB-linear control, the structure is compact and power efficient. The designed two-stage VGA shows a gain control range of 60dB with the gain error in the range of ${\pm}0.4$ dB. The power consumption including the output buffer is 20.4 mW from 1.2 V supply voltage with bandwidth of 630 MHz. The prototype was fabricated in a 0.13 ${\mu}m$ CMOS process and the VGA core occupies 0.06 $mm^2$.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2013년도 전력전자학술대회 논문집
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• pp.184-185
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• 2013

In this paper, design of a variable inductor using MR Fluid Gap is proposed for wide load range efficiency improvement of a bidirectional DC-DC converter. As compared to conventional constant value inductor designed to have negative current for ZVS at heavy load but suffers high losses at light load due to its small inductance, the proposed variable inductor not only have small inductance at high current for ZVS but also it has large inductance at low current to decrease light load losses.

• 한국전기전자재료학회논문지
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• 제17권4호
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• pp.448-452
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• 2004

The micromachined variable optical attenuator(VOA) was presented in the paper. The VOA has two single mode fiber(SMF) aligned with free space and symmetric parallel plate actuator with microshutter, which can control a amount of light by driving the actuator. In the paper, analysis on driving performances of the VOA was performed and can be reduced threshold voltage through the decreasing displacement actuating range. This paper presents a VOA that is fabricated using bosch deep silicon etching process with silicon on insulator(SOD wafer. The VOA consists of driving electrode, ground electrode, actuating microshutter, and mechanical stopper. In this VOA, actuating shutter is driven by electrostatic force and the threshold voltage is close to 28V, 46V come along with the spring width of 5${\mu}{\textrm}{m}$, 7${\mu}{\textrm}{m}$ respectively. Attenuation range is measured from 2.4㏈ to 16.7㏈.

• ETRI Journal
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• 제28권3호
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• pp.386-388
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• 2006

Monolithic SiGe heterojunction bipolar transistor (HBT) variable gain amplifiers (VGAs) with a feedforward configuration have been newly developed for 5 GHz applications. Two types of the feedforward VGAs have been made: one using a coupled-emitter resistor and the other using an HBT-based current source. At 5.2 GHz, both of the VGAs achieve a dynamic gain-control range of 23 dB with a control-voltage range from 0.4 to 2.6 V. The gain-tuning sensitivity is 90 mV/dB. At $V_{CTRL}$= 2.4 V, the 1 dB compression output power, $P_{1-dB}$, and dc bias current are 0 dBm and 59 mA in a VGA with an emitter resistor and -1.8 dBm and 71mA in a VGA with a constant current source, respectively.

• 한국통신학회논문지
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• 제31권3A호
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• pp.356-359
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• 2006

A monolithic SiGe HBT variable gain driver amplifier(VGDA) with high dB-linear gain control and high linearity has been developed as a driver amplifier with ground-shielded microstrip lines for 5-GHz transmitters. The VGDA consists of three blocks such as the cascode gain-control stage, fixed-gain output stage, and voltage control block. The circuit elements were optimized by using the Agilent Technologies' ADSs. The VGDA was implemented in STMicroelectronics' 0.35${\mu}m$ Si-BiCMOS process. The VGDA exhibits a dynamic gain control range of 34 dB with the control voltage range from 0 to 2.3 V in 5.15-5.35 GHz band. At 5.15 GHz, maximum gain and attenuation are 10.5 dB and -23.6 dB, respectively. The amplifier also produces a 1-dB gain-compression output power of -3 dBm and output third-order intercept point of 7.5 dBm. Input/output voltage standing wave ratios of the VGDA keep low and constant despite change in the gain-control voltage.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제53권2호
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• pp.90-98
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• 2004

Variable-speed drives are being continually innovated. Recently, sensorless induction motor drives have been much studied due to several advantages. Most sensorless algorithms are based on the mathematical modeling of motors, and all the information is obtained from the monitored voltages and currents. Therefore, the accuracy of such variables largely affects the performance of a sensorless induction motor drive. However, the output voltage of the SVPWM-VSI which is widely used in a sensorless induction motor drive has a considerable error, especially in a low speed range. This paper proposes a variation of the dc link voltage as a high-performance strategy for overcoming the above problem. The proposed strategy leads to an improved resolution of the output voltage of the SVPWM-VSI in a sensorless induction motor drive. Simulation and experiment have been performed for the verification of the proposed strategy.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권4호
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• pp.282-291
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• 2010

This paper presents a full-CMOS transmitter and receiver for VDSL2 systems. The transmitter part consists of the low-pass filter, programmable gain amplifier (PGA) and 14-bit DAC. The receiver part consists of the low-pass filter, variable gain amplifier (VGA), and 13-bit ADC. The low pass filter and PGA are designed to support the variable data rate. The RC bank sharing architecture for the low pass filter has reduced the chip size significantly. And, the 80 Msps, high resolution DAC and ADC are integrated to guarantee the SNR. Also, the transmitter and receiver are designed to have a wide dynamic range and gain control range because the signal from the VDSL2 line is variable depending on the distance. The chip is implemented in 0.25 ${\mu}m$ CMOS technology and the die area is 5 mm $\times$ 5 mm. The spurious free dynamic range (SFDR) and SNR of the transmitter and receiver are 67.5 dB and 41 dB, respectively. The power consumption of the transmitter and receiver are 160 mW and 250 mW from the supply voltage of 2.5 V, respectively.