• Title/Summary/Keyword: Trench electrode

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A Study on New High Density DRAM Cell (고밀도 DRAM Cell의 새로운 구조에 관한 연구)

  • Yi, Cheon-Hee
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.6
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    • pp.124-130
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    • 1989
  • For the higher density DRAM'S, innovations in fabrication process and circuit design which have led to dramatic density improvement are discussed from the desinger's perspective. A new dynamic RAM cell called Trench Epitaxial Transistor Cell(TETC) using trench technics and SEG have been developed for use in future megabit DRAMS. Storge electrode with $n^+$-polysilicon and $n^+$-source electrode are self-contacted in TETC. With keeping the storage capacitance large enough to prevent soft errors, the cell size reduced to 30% compare with existing BSE cell by utilizing the vertical capacitor made along the isolation region.

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Electro-optical Characteristics of Full-HD LCOS Depending on the Trench Structure between Adjacent Pixels (Full-HD LCOS의 이웃한 픽셀 사이의 Trench구조 변화에 따른 전기광학적 특성 분석)

  • SonHong, Hong-Bae;Kim, Min-Seok;Kang, Jung-Wwon
    • Journal of the Semiconductor & Display Technology
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    • v.8 no.2
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    • pp.59-62
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    • 2009
  • In order to check the validation of LC simulation, 0.7 inch LCOS panel in full-HD resolution was fabricated and used for the electro-optical measurement. Compared the measured data with the calculated data, the averaged difference was 1.72% under 0 ~ +6 V bias on pixel electrode. To improve the optical characteristics of full-HD LCOS panel, the planar structure and trench structures (0.1 um, 0.2 um and 0.3 um-in-depth) between adjacent pixels were investigated with LC simulation. The planar structure showed the higher reflectance and faster reflectance-voltage response time than the trench structure. The optical fill factor and contrast ratio of planar structure were also higher than those of trench structures. As compared 1 um-in-depth trench structure resembled to the real structure with the planar structure, the optical fill factor was improved by 1.15% and the contrast ratio was improved by 5.26%. In order to minimize the loss of luminance and contrast ratio, the planar structure need to be applied between adjacent pixels.

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Study on Electrical Characteristics of the Fabricated Lateral Trench Electrode IGBT with p+ Diverter (효율적인 p+ 다이버터를 갖는 수평형 트렌치 전극형 IGBT의 제작에 따른 전기적 특성에 관한 연구)

  • 강이구;김상식;성만영
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.9
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    • pp.750-757
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    • 2002
  • A new lateral trench LTEIGBT with p+ diverter was proposed to suppress latch-up of LTIGBT The p+ diverter was placed between the anode and cathode electrode. The latch-up of LTEICBT with a p+ diverter was effectively suppressed to sustain an anode voltage of 8.7V and a current density of 1453A/$\textrm{cm}^2$ while in the conventional LTIGBT, latch-up occured at an anode current density of 540A/$\textrm{cm}^2$. In addition, the forward blocking voltage of the proposed LTEIGBT with a p+ diverter was about 140V. The forward blocking voltage of the conventional LTIGBT of the same size was no more than 105V, We fabricated the proposed LTEIGBT with a p+ diverter after the device and process simulation was finished. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT with a p+ diverter and the conventional LIGBT are 90㎃ and 70㎃, respectively, at the same breakdown voltage of 150V.

A New EST with Dual Trench Gate Electrode (DTG-EST)

  • Kim, Dae-Won;Sung, Man-Young;Kang, Ey-Goo
    • Transactions on Electrical and Electronic Materials
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    • v.4 no.2
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    • pp.15-19
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    • 2003
  • In this paper, the new dual trench gate Emitter Switched Thyristor (DTG-EST) is proposed for improving snap-back effect which leads to a lot of serious problems of device applications. Also the parasitic thyristor that is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The conventional EST exhibits snap-back with the anode voltage and current density 2.73V and 35A/$\textrm{cm}^2$, respectively. But the proposed DTG-EST exhibits snap-back with the anode voltage and current density 0.96V and 100A/$\textrm{cm}^2$, respectively.

Design and Fabrication of 1700 V Emitter Switched Thyristor (1700 V급 EST소자의 설계 및 제작에 관한 연구)

  • Kang, Ey-Goo;Ahn, Byoung-Sub;Nam, Tae-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.3
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    • pp.183-189
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    • 2010
  • In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.

Fabrication of Micro Pattern on Flexible Substrate by Nano Ink using Superhydrophobic Effect (초발수 현상을 이용한 나노 잉크 미세배선 제조)

  • Son, Soo-Jung;Cho, Young-Sang;Rha, Jong Joo;Cho, Chul-Jin
    • Journal of Powder Materials
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    • v.20 no.2
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    • pp.120-124
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    • 2013
  • This study is carried out to develop the new process for the fabrication of ultra-fine electrodes on the flexible substrates using superhydrophobic effect. A facile method was developed to form the ultra-fine trenches on the flexible substrates treated by plasma etching and to print the fine metal electrodes using conductive nano-ink. Various plasma etching conditions were investigated for the hydrophobic surface treatment of flexible polyimide (PI) films. The micro-trench on the hydrophobic PI film fabricated under optimized conditions was obtained by mechanical scratching, which gave the hydrophilic property only to the trench area. Finally, the patterning by selective deposition of ink materials was performed using the conductive silver nano-ink. The interface between the conductive nanoparticles and the flexible substrates were characterized by scanning electron microscope. The increase of the sintering temperature and metal concentration of ink caused the reduction of electrical resistance. The sintering temperature lower than $200^{\circ}C$ resulted in good interfacial bonding between Ag electrode and PI film substrate.

Superconformal gap-filling of nano trenches by metalorganic chemical vapor deposition (MOCVD) with hydrogen plasma treatment

  • Moon, H.K.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.246-246
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    • 2010
  • As the trench width in the interconnect technology decreases down to nano-scale below 50 nm, superconformal gap-filling process of Cu becomes very critical for Cu interconnect. Obtaining superconfomral gap-filling of Cu in the nano-scale trench or via hole using MOCVD is essential to control nucleation and growth of Cu. Therefore, nucleation of Cu must be suppressed near the entrance surface of the trench while Cu layer nucleates and grows at the bottom of the trench. In this study, suppression of Cu nucleation was achieved by treating the Ru barrier metal surface with capacitively coupled hydrogen plasma. Effect of hydrogen plasma pretreatment on Cu nucleation was investigated during MOCVD on atomic-layer deposited (ALD)-Ru barrier surface. It was found that the nucleation and growth of Cu was affected by hydrogen plasma treatment condition. In particular, as the plasma pretreatment time and electrode power increased, Cu nucleation was inhibited. Experimental data suggests that hydrogen atoms from the plasma was implanted onto the Ru surface, which resulted in suppression of Cu nucleation owing to prevention of adsorption of Cu precursor molecules. Due to the hydrogen plasma treatment of the trench on Ru barrier surface, the suppression of Cu nucleation near the entrance of the trenches was achieved and then led to the superconformal gap filling of the nano-scale trenches. In the case for without hydrogen plasma treatments, however, over-grown Cu covered the whole entrance of nano-scale trenches. Detailed mechanism of nucleation suppression and resulting in nano-scale superconformal gap-filling of Cu will be discussed in detail.

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Simulated DC Characteristics of AlGaN/GaN HEMls with Trench Shaped Source/Drain Structures (트렌치 구조의 소스와 드레인 구조를 갖는 AlGaN/GaN HEMT의 DC 출력특성 전산모사)

  • Jung, Kang-Min;Lee, Young-Soo;Kim, Su-Jin;Kim, Dong-Ho;Kim, Jae-Moo;Choi, Hong-Goo;Hahn, Cheol-Koo;Kim, Tae-Geun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.10
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    • pp.885-888
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    • 2008
  • We present simulation results on DC characteristics of AlGaN/GaN HEMTs having trench shaped source/drain Ohmic electrodes. In order to reduce the contact resistance in the source and drain region of the conventional AlGaN/GaN HEMTs and thereby to increase their DC output power, we applied narrow-shaped-trench electrode schemes whose size varies from $0.5{\mu}m$ to $1{\mu}m$ to the standard AlGaN/GaN HEMT structure. As a result, we found that the drain current was increased by 13 % at the same gate bias condition and the transconductance (gm) was improved by 11 % for the proposed AlGaN/GaN HEMT, compared with those of the conventional AlGaN/GaN HEMTs.

Improvement of Bonding Strength Uniformity in Silicon-on-glass Process by Anchor Design (Silicon-on-glass 공정에서 접합력 균일도 향상을 위한 고정단 설계)

  • Park, Usung;An, Jun Eon;Yoon, Sungjin
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.41 no.6
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    • pp.423-427
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    • 2017
  • In this paper, an anchor design that improves bonding strength uniformity in the silicon-on-glass (SOG) process is presented. The SOG process is widely used in conjunction with electrode-patterned glass substrates as a standard fabrication process for forming high-aspect-ratio movable silicon microstructures in various types of sensors, including inertial and resonant sensors. In the proposed anchor design, a trench separates the silicon-bonded area and the electrode contact area to prevent irregular bonding caused by the protrusion of the electrode layer beyond the glass surface. This technique can be conveniently adopted to almost all devices fabricated by the SOG process without the necessity of additional processes.

Fabrication of a Bottom Electrode for a Nano-scale Beam Resonator Using Backside Exposure with a Self-aligned Metal Mask

  • Lee, Yong-Seok;Jang, Yun-Ho;Bang, Yong-Seung;Kim, Jung-Mu;Kim, Jong-Man;Kim, Yong-Kweon
    • Journal of Electrical Engineering and Technology
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    • v.4 no.4
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    • pp.546-551
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    • 2009
  • In this paper, we describe a self-aligned fabrication method for a nano-patterned bottom electrode using flood exposure from the backside. Misalignments between layers could cause the final devices to fail after the fabrication of the nano-scale bottom electrodes. A self-alignment was exploited to embed the bottom electrode inside the glass substrate. Aluminum patterns act as a dry etching mask to fabricate glass trenches as well as a self-aligned photomask during the flood exposure from the backside. The patterned photoresist (PR) has a negative sidewall slope using the flood exposure. The sidewall slopes of the glass trench and the patterned PR were $54.00^{\circ}$ and $63.47^{\circ}$, respectively. The negative sidewall enables an embedment of a gold layer inside $0.7{\mu}m$ wide glass trenches. Gold residues on the trench edges were removed by the additional flood exposure with wet etching. The sidewall slopes of the patterned PR are related to the slopes of the glass trenches. Nano-scale bottom electrodes inside the glass trenches will be used in beam resonators operating at high resonant frequencies.