• Title/Summary/Keyword: Time Delay and Integration

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A Study on Bandwidth Provisioning Mechanism using ATM Shortcut in MPLS Networks

  • Lee, Gyu-Myoung;Park, Jun-Kyun
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.529-532
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    • 2000
  • This paper addresses how to be connected with end-to-end shortcut using ATM Switched Virtual Connection (SVC) in ATM-based Multi-Protocol Label Switching (MPLS) Networks. Without additionally existing ATM Ships-in-the-Night (SIN) mode, when the stream is continuously transmitted at the same destination with the lapse of determined aging time, the connection is changed with end-to-end shortcut connection using ATM signaling. An ATM direct short circuit is performed an IP and ATM effective integration. An ATM shortcut has a number of advantages, like higher throughput, shorter end-to-end delay, reduced router load, better utilization of L2 Quality of Service (QoS) capabilities, and route optimization. In particular between other MPLS domains, this can be efficiently improved the performance of networks.

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Study for improve the tracing sopping ratio of ATO train through test procedure and system integration (자동운전 차량의 정위치 정차율 향상을 위한 시스템 기능 개선 및 시험 방안에 관한 연구)

  • Lee, Kyoung-Bok;Lee, Heui-Seon;Cha, Joon-Il;Kim, Kyu-Joong
    • Proceedings of the KSR Conference
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    • 2009.05a
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    • pp.270-277
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    • 2009
  • This paper describes the method of how to improve the probability of the tracing stopping ratio which is the most important factor in Automatic Train Operation (ATO). Aspects of improving the performance of automatic driving, the followings are investigated and studied : the interface between the signal system and the vehicle, the need to improve braking system, test method of blending brakes, how to minimize the delay of commands for real-time control. In this study, we applied this method to prove the effectiveness in DAEJEON LINE1

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Effect of Bonding Process Conditions on the Interfacial Adhesion Energy of Al-Al Direct Bonds (접합 공정 조건이 Al-Al 접합의 계면접착에너지에 미치는 영향)

  • Kim, Jae-Won;Jeong, Myeong-Hyeok;Jang, Eun-Jung;Park, Sung-Cheol;Cakmak, Erkan;Kim, Bi-Oh;Matthias, Thorsten;Kim, Sung-Dong;Park, Young-Bae
    • Korean Journal of Materials Research
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    • v.20 no.6
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    • pp.319-325
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    • 2010
  • 3-D IC integration enables the smallest form factor and highest performance due to the shortest and most plentiful interconnects between chips. Direct metal bonding has several advantages over the solder-based bonding, including lower electrical resistivity, better electromigration resistance and more reduced interconnect RC delay, while high process temperature is one of the major bottlenecks of metal direct bonding because it can negatively influence device reliability and manufacturing yield. We performed quantitative analyses of the interfacial properties of Al-Al bonds with varying process parameters, bonding temperature, bonding time, and bonding environment. A 4-point bending method was used to measure the interfacial adhesion energy. The quantitative interfacial adhesion energy measured by a 4-point bending test shows 1.33, 2.25, and $6.44\;J/m^2$ for 400, 450, and $500^{\circ}C$, respectively, in a $N_2$ atmosphere. Increasing the bonding time from 1 to 4 hrs enhanced the interfacial fracture toughness while the effects of forming gas were negligible, which were correlated to the bonding interface analysis results. XPS depth analysis results on the delaminated interfaces showed that the relative area fraction of aluminum oxide to the pure aluminum phase near the bonding surfaces match well the variations of interfacial adhesion energies with bonding process conditions.

Astronomical seeing analysis of Deokheung Optical Astronomy Observatory

  • Kim, Taewoo;Kang, Wonseok;Kwon, Sun-gill;Lee, Sang-Gak
    • The Bulletin of The Korean Astronomical Society
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    • v.40 no.2
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    • pp.59.2-59.2
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    • 2015
  • 국립고흥청소년우주체험센터는 2014년부터 덕흥천문대에 설치된 SBIG사의 "Seeing Monitor"로 시상을 측정하고 있다. "Seeing Monitor"는 북극성을 대상으로 TDI(Time Delay and Integration) 방식을 적용하여 얻어진 시상을 분 단위로 저장해준다. 따라서 구름이 없는 맑은 날의 분 단위 시상 자료와 주변 환경 정보를 조합하여 시상에 영향을 미치는지 환경 요인을 정량적으로 분석하는 것이 가능하다. 그 첫 단계로 측정된 시상 자료와 기상청의 온도 습도 풍속 자료, 그리고 GFS(Global Forecast System)의 고도별 상층 풍속 자료를 비교하여 기상정보와 시상과의 관계를 분석해보았다. 습도와 바람이 시상에 가장 큰 영향을 주었으며, 지상 풍속 1~2m/s, 습도 75% 이하, 제트기류 풍속은 250km/h 이하 일 때 좋은 시상 값을 얻을 수 있었다. 이를 통해 덕흥천문대에서 기상정보를 통해 시상이 안정적인 날을 예측할 수 있다면, 앞으로 도입될 1m 망원경으로 훌륭한 관측 자료를 얻을 수 있을 것이라 기대된다.

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고해상도 위성카메라의 선형운동에 의한 영상번짐 해석

  • 장홍술
    • Bulletin of the Korean Space Science Society
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    • 2003.10a
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    • pp.103-103
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    • 2003
  • 공간해상도가 높고 영상 신호량의 증가를 위해 TDI(time delay and integration) 방식의 센서를 이용하는 저궤도 위성카메라의 경우 지구의 자전효과나 위성의 자세 불안정 등으로 인해 촬영된 영상의 퍼짐현상(smearing)이 나타난다. 본 연구에 따르면 선형운동에 의한 결과로 발생하는 영상퍼짐은 위성의 자세제어 특성 뿐 만 아니라 위성의 궤도 특성과 TDI 단계, 지상 촬영 지점의 위도 및 경사촬영 각도에 의해 결정되며 다목적 실용위성 2호(KOMPSAT2)의 탑재카메라를 실례로 살펴본 해상도 1m급의 태양동기궤도 위성의 경우 별도의 보정 과정이 없을 경우 영상의 퍼짐이 심각한 것으로 나타난다. 주된 원인은 지구의 자전효과이며 영상퍼짐의 정도는 위성 직하점의 위도에 따라 변하고 카메라의 경사촬영 각도와는 연관성이 작은 것으로 나타난다. 또한 촬영전에 자세제어를 이용해 카메라의 Yaw축 각도를 조정할 경우 영상퍼짐현상이 현저히 감소함을 보여준다.

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A Heuristic Algorithm of an Efficient Berth Allocation for a Public Container Terminal (공공 컨테이너 터미널의 효율적인 선석할당을 위한 발견적 알고리즘 개발에 관한 연구)

  • Keum, J.S.
    • Journal of Korean Port Research
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    • v.11 no.2
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    • pp.191-202
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    • 1997
  • As the suitability of berth allocation will ultimately have a significant influence on the performance of a berth, a great deal of attention should be given to berth allocation. Generally, a berth allocation problem has conflicting factors between servers and users. In addition, there is uncertainty in great extent caused by various factors such as departure delay, inclement weather on route, poor handling equipment, a lack of storage space, and other factors contribute to the uncertainty of arrival and berthing time. Thus, it is necessary to establish berth allocation planning which reflects the positions of interested parties and the ambiguity of parameters. For this, a berth allocation problem is formulated by fuzzy 0-1 integer programming introducing the concept of maximum Position Shift(MPS). But, the above approach has limitations in terms of computational time and computer memory when the size of problem is increased. It also has limitations with respect to the integration of other sub-systems such as ship planning system and yard planning system. For solving such problem, this paper focuses particularly on developing an efficient heuristic algorithm as a new technique of getting an effective solution. And also the suggested algorithm is verified through the illustrative examples and empirical appalicaton to BCTOC.

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PN code acquisition for the N-path RAKE receiver in the DS/CDMA systems (DS/CDMA 이동통신 시스템의 N-경로 RAKE 수신기를 위한 PN 코드동기)

  • 이한섭;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.6
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    • pp.1510-1521
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    • 1996
  • This paper presents acquisition algorithm and an improved detection technique for the DS/CDMA (direction sequence code division multiple access) RAKE receiver in multipath fading channel. The DS/CDMA systems use the RAKE receiver, an accurate code acquisition is required for the RAKE branches. The algorithmis able to findthe pseudonoise (PN) code delay estimates for the RAKE branches in a multipath fading channel. In this paper a numerical method and computer simulation simulation have been developed for the acquisition system. The detection probability and mean acquisition time are investigated asa performance measure of the system using the Monte Carlo method. And also in order to analyze the effect of the acquisition on the RAKE receiver this paper bring out the effect of integration time, doppler frequency, processing gain and the number of users on the acquired code phase.

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Precision time sync. HW/SW platform for power system protection (전력시스템 보호를 위한 정밀 시각 동기 적용 HW/SW 플랫폼 기술)

  • Nam, Kyung-Deok;Son, Kyu-Jung;Chang, Tae-Gyu;Kang, Sang-Hee
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1036-1043
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    • 2018
  • This paper presented future power system protection technologies through the HW/SW integration platform with IEC 61850 and IEEE c37.238 standards. To determine the implementation performance of the integrated platform, an example of EVM (Evaluation Module) was constructed to satisfy the standards. The platform has been identified as a future power system integrated IED(Intelligent Electronic Device) HW/SW technology that meets the level of error required by the time sync standard and the level of delay required by protecting the power system.

A Study on the Start-Up Scheme of Direct Vector Controlled Induction Motor System (유도전동기의 직접 벡터제어 시스템에서 기동기법에 관한 연구)

  • 전태원;최명규;유우종
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.5
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    • pp.427-434
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    • 2000
  • The paper proposes a zero speed start-up scheme of direct rector controlled induction motor drive without any torque jerk. At standstill condition, a method is derived to calculate a stator flux with only stator current. The programmable 3-stage low pass filters with programmable time constants is used in order to solute the problem of integration for stator flux estimation in the direct vector control mode. Due to the time delay of 3-stage low pass filter, the status flux decreases rapidly and also the torque jerk occurs during the transition from standstill mode to the direct rector control mode. A feedforward control strategy of the stator flux is suggested to prevent the torque jerk at start-up. Through results of simulation and experiment with 32 bit DSP, the performance of the start-up scheme is verified.

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An Efficient Bit Stream Instruction-set for Network Packet Processing Applications (네트워크 패킷 처리를 위한 효율적인 비트 스트림 명령어 세트)

  • Yoon, Yeo-Phil;Lee, Yong-Surk;Lee, Jung-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.10
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    • pp.53-58
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    • 2008
  • This paper proposes a new set of instructions to improve the packet processing capacity of a network processor. The proposed set of instructions is able to achieve more efficient packet processing by accelerating integration of packet headers. Furthermore, a hardware configuration dedicated to processing overlay instructions was designed to reduce additional hardware cost. For this purpose, the basic architecture for the network processor was designed using LISA and the overlay block was optimized based on the barrel shifter. The block was synthesized to compare the area and the operation delay, and allocated to a C-level macro function using the compiler known function (CKF). The improvement in performance was confirmed by comparing the execution cycle and the execution time of an application program. Experiments were conducted using the processor designer and the compiler designer from Coware. The result of synthesis with the TSMC ($0.25{\mu}m$) from Synopsys indicated a reduction in operation delay by 20.7% and an improvement in performance of 30.8% with the proposed set of instructions for the entire execution cycle.