• Journal of Sensor Science and Technology
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• v.32 no.6
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• pp.425-431
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• 2023

An asymmetric metal-semiconductor-metal Al_0.24Ga_0.76N ultraviolet (UV) sensor was fabricated, and the effects of local Joule heating were investigated. After dielectric breakdown, the current density under a reverse bias of 2.0 V was 1.1×10^-9 A/cm², significantly lower than 1.2×10^-8 A/cm² before dielectric breakdown; moreover, the Schottky behavior of the Ti/Al/Ni/Au electrode changed to ohmic behavior under forward bias. The UV-to-visible rejection ratio (UVRR) under a reverse bias of 7.0 V before dielectric breakdown was 87; however, this UVRR significantly increased to 578, in addition to providing highly reliable responsivity. Transmission electron microscopy revealed interdiffusion between adjacent layers, with nitrogen vacancies possibly formed owing to local Joule heating at the AlGaN/Ti/Al/Ni/Au interfaces. X-ray photoelectron microscopy results revealed decreases in the peak intensities of the O 1s binding energies associated with the Ga-O bond and OH-, which act as electron-trapping states on the AlGaN surface. The reduction in dark current owing to the proposed local heating method is expected to increase the sensing performance of UV optoelectronic integrated devices, such as active-pixel UV image sensors.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.306-306
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• 2013

p-type Si(100)기판위에 Al2O3 박막을 증착하고 Si/SiO2 박막을 연속 증착하여 태양전지를 제작하였다. Si/SiO2 박막을 연속으로 증착하면 양자 구속이 일어나고 이로 인한 유효밴드 갭이 증가하게 되고, tunnel effect와 계면에서의 passivation 효과를 기대할 수 있다. 이런 효과들을 이용하여 고효율 태양전지를 기대 할 수 있다. 본 연구에서는 Remote Plasma Atomic Layer Deposition(RPALD)를 이용하여 Al2O3를 증착하였고 RF-Magnetron Sputter와 e-beam Evaporator 장비를 이용하여 Si/SiO2을 증착하였다. 전극으로는 Ti/Ag와 Al을 이용하였다. Solar simulator 장비를 이용하여 cell의 전기적 특성 평가를 평가하였고(Fig. 1) QE 측정장비를 통해 파장대의 따른 광학적 측정을 하였다(Fig. 2). ellipsometer 장비와 ${\alpha}$-step 장비로 박막과 전극의 두께를 측정하였고 4-point prove 장비를 이용하여 면저항, 저항율을 측정 평가하였다. 또한 I-V, C-V 측정 결과 터널링 현상이 일어나는 것을 확인 하였으며, Si/SiO2 다중 박막을 연속 증착 할수록 cell 효율이 더 좋게 나온다는 것을 확인하였다.

• Journal of Electrochemical Science and Technology
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• v.8 no.1
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• pp.15-24
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• 2017

A comparative study was performed on the passivating abilities of surface films generated on lithium titanate (LTO; $Li_4Ti_5O_{12}$) electrodes during pre-cycling at two different rates. The surface film deposited at a faster pre-cycling rate (i.e., 0.5 C) is irregularly shaped and unevenly covers the LTO electrode. Owing to the incomplete coverage of the protective film, this LTO electrode exhibits poor passivating ability. Additional electrolyte decomposition and concomitant film deposition occur during subsequent charge/discharge cycles. As a result of the thick surface film, severe cell polarization occurs and eventually causes cell failure. However, pre-cycling the Li/LTO cell at a slower rate (0.1 C) improves cell polarization and capacity retention; this occurs because the surface film uniformly covers the LTO electrode and provides strong passivation. Accordingly, there is no significant film deposition during subsequent charge/discharge cycling. Additionally, self-discharge is reduced during high-temperature storage.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.3
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• pp.9-15
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• 2021

Miniaturization of semiconductor devices has recently faced a physical limitation. To overcome this, 3D packaging in which semiconductor devices are vertically stacked has been actively developed. 3D packaging requires three unit processes of TSV, wafer grinding, and bonding, and among these, copper bonding is becoming very important for high performance and fine-pitch in 3D packaging. In this study, the effects of Ti nanolayer on the antioxidation of copper surface and low-temperature Cu bonding was investigated. The diffusion rate of Ti into Cu is faster than Cu into Ti in the temperature ranging from room temperature to 200℃, which shows that the titanium nanolayer can be effective for low-temperature copper bonding. The 12nm-thick titanium layer was uniformly deposited on the copper surface, and the surface roughness (R_q) was lowered from 4.1 nm to 3.2 nm. Cu bonding using Ti nanolayer was carried out at 200℃ for 1 hour, and then annealing at the same temperature and time. The average shear strength measured after bonding was 13.2 MPa.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• Korean Journal of Materials Research
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• v.7 no.9
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• pp.811-823
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• 1997

차세대 반도체 배선분야에서, Cu박막은 현재의 AI을 대체할 물질로서 대두되고 있으며 CVD에 의한 선택적 증착은 Cu의 patterning과 관련하여 상당한 관심을 일으키고 있다. 본 연구에서는 (hfac)Cu(VTMS)의 유기원료를 사용하여, CVD공정변수, 운반기체, 표면 처리 공정에 따른 SiO$_{2}$, TiN, AI기판에 대한 선택성을조사하였다. 선택성은 저온(15$0^{\circ}C$), 저합(0.3Torr)에서 향상될 수 있었으며, 특히, HMDS in-situ-predosing공정에 의해 더욱 향상될 수 있었다. 모든 경우에 대해, H$_{2}$운반기체가 Ar 보다 짧은 incubation time과 높은 증착 속도가 얻어졌으며, Cu입자들의 크기가 작고 연결상태가 보다 양호하였다. 이는 H$_{2}$경우에 기판표면에 원료가 흡착되어 핵을 형성시키는 위치 (-OH)가 보다 많이 제공되기 때문으로 여겨진다. 이러한 미세구조의 차이는 H$_{2}$경우에 보다 낮은 비저항을 얻게 했다. HMDS in-situ predosing공정에 의한 Cu박막내 불순물 차이는 없었으며 뚜렷한 비저항의 차이도 나타나지 않았다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.6
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• pp.515-520
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• 2005

CMP(chemical mechanical polishing) process has been attracted as an essential technology of multi-level interconnection. Also CMP process got into key process for global planarization in the chip manufacturing process. In this study, potentiodynamic polarization was carried out to investigate the influences of $H_2O_2$ concentration and metal oxide formation through the passivation on tungsten and titanium. Fortunately, the electrochemical behaviors of tungsten and titanium are similar, an one may expect. As an experimental result, electrochemical corrosion of the $5\;vol\%\;H_2O_2$ concentration of tungsten and titanium films was higher than the other concentrations. According to the analysis, the oxidation state and microstructure of surface layer were strongly influenced by different oxidizer concentration. Moreover, the oxidation kinetics and resulting chemical state of oxide layer played critical roles in determining the overall CMP performance. Therefore, we conclude that the CMP characteristics tungsten and titanium metal layer including surface roughness were strongly dependent on the amounts of hydrogen peroxide oxidizer.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.3
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• pp.31-36
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• 2018

This research scrutinizes the reason of failure after pressure cooker test (PCT) for DRAM device. We use the physical inspecting tools, such as microscope, SEM and TEM, and finally find the discolor phenomenon, corrosion of Al and delamination of inter-metal dielectric (IMD) in the failed devices after PCT. Furthermore, we discover the abnormal $Al_XO_Y$ layer on Al through the careful additional measurements. To find the reason, we evaluate the effect of package ball size and pinhole in passivation layer. Unfortunately, those aren't related to the problems. We also estimate halide effect of Al. The halogens such like Cl are contained within EMC material. Those result in the slight improving of PCT characteristics but do not perfectly solve the problems. We make a hypothesis of Galvanic corrosion. We can find the residue of Ti at the edge of pad open area. We can see the improving the PCT characteristics by the time split of repair etch. The possible mechanism of the PCT failure can be deduced as such following sequence of reactions. The remained Ti reacts on the pad Al by Galvanic corrosion. The ionized Al is easily react with the $H_2O$ supplied under PCT environment, and finally transfers to the abnormal $Al_XO_Y$ layer.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.179-184
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• 2016

In recent years, the on-resistance, power loss and cell density of Si power devices have not exhibited significant improvements, and performance is approaching the material limits. GaN is considered an attractive material for future high-power applications because of the wide band-gap, large breakdown field, high electron mobility, high switching speed and low on-resistance. Here we report on the Ohmic contact resistance and reverse-bias characteristics of AlGaN/GaN Schottky barrier diodes with and without annealing. Annealing in oxygen at $500^{\circ}C$ resulted in an increase in the breakdown voltage from 641 to 1,172 V for devices with an anode-cathode separation of $20{\mu}m$. However, these annealing conditions also resulted in an increase in the contact resistance of $0.183{\Omega}-mm$, which is attributed to oxidation of the metal contacts. Auger electron spectroscopy revealed diffusion of oxygen and Au into the AlGaN and GaN layers following annealing. The improved reverse-bias characteristics following annealing in oxygen are attributed to passivation of dangling bonds and plasma damage due to interactions between oxygen and GaN/AlGaN. Thermal annealing is therefore useful during the fabrication of high-voltage GaN devices, but the effects on the Ohmic contact resistance should be considered.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.7
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• pp.486-493
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• 2003

Schottky type A $l_{0.33}$G $a_{0.67}$N ultraviolet photodetectors were fabricated on the MOCVD grown AlGaN/ $n^{＋}$-GaN and AlGaN/AlGaN interlayer/ $n^{＋}$-GaN structures. The grown layers have the carrier concentrations of -$10^{18}$, and the mobilities were 236 and 269 $\textrm{cm}^2$/V.s, respectively. After mesa etching by ICP etching system, the Si3N4 layer was deposited for passivation between the contacts and Ti/AL/Ni/Au and Pt were deposited for ohmic and Schottky contact, respectively. The fabricated Pt/A $l_{0.33}$G $a_{0.67}$N Schottky diode revealed a leakage current of 1 nA for samples with interlayer and 0.1$\mu\textrm{A}$ for samples without interlayer at a reverse bias of -5 V. In optical measurement, the Pt/A $l_{0.33}$G $a_{0.67}$N diode with interlayer showed a cut-off wavelength of 300 nm, a prominent responsivity of 0.15 A/W at 280 nm and a UV-visible extinction ratio of 1.5x$10^4./TEX>.