• Title/Summary/Keyword: Threshold-Voltage

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Analytic Threshold Voltage Model of Recessed Channel MOSFETs

  • Kwon, Yong-Min;Kang, Yeon-Sung;Lee, Sang-Hoon;Park, Byung-Gook;Shin, Hyung-Cheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.1
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    • pp.61-65
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    • 2010
  • Threshold voltage is one of the most important factors in a device modeling. In this paper, analytical method to calculate threshold voltage for recessed channel (RC) MOSFETs is studied. If we know the fundamental parameter of device, such as radius, oxide thickness and doping concentration, threshold voltage can be obtained easily by using this model. The model predicts the threshold voltage which is the result of 2D numerical device simulation.

Analysis of Transport Characteristics for FinFET Using Three Dimension Poisson's Equation

  • Jung, Hak-Kee;Han, Ji-Hyeong
    • Journal of information and communication convergence engineering
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    • v.7 no.3
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    • pp.361-365
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    • 2009
  • This paper has been presented the transport characteristics of FinFET using the analytical potential model based on the Poisson's equation in subthreshold and threshold region. The threshold voltage is the most important factor of device design since threshold voltage decides ON/OFF of transistor. We have investigated the variations of threshold voltage and drain induced barrier lowing according to the variation of geometry such as the length, width and thickness of channel. The analytical potential model derived from the three dimensional Poisson's equation has been used since the channel electrostatics under threshold and subthreshold region is governed by the Poisson's equation. The appropriate boundary conditions for source/drain and gates has been also used to solve analytically the three dimensional Poisson's equation. Since the model is validated by comparing with the three dimensional numerical simulation, the subthreshold current is derived from this potential model. The threshold voltage is obtained from calculating the front gate bias when the drain current is $10^{-6}A$.

Threshold Voltage Shift for Doping Profile of Asymmetric Double Gate MOSFET (도핑분포함수에 따른 비대칭 이중게이트 MOSFET의 문턱전압이동현상)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.4
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    • pp.903-908
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    • 2015
  • This paper has analyzed threshold voltage shift for doping profile of asymmetric double gate(DG) MOSFET. Ion implantation is usually used in process of doping for semiconductor device and doping profile becomes Gaussian distribution. Gaussian distribution function is changed for projected range and standard projected deviation, and influenced on transport characteristics. Therefore, doping profile in channel of asymmetric DGMOSFET is affected in threshold voltage. Threshold voltage is minimum gate voltage to operate transistor, and defined as top gate voltage when drain current is $0.1{\mu}A$ per unit width. The analytical potential distribution of series form is derived from Poisson's equation to obtain threshold voltage. As a result, threshold voltage is greatly changed by doping profile in high doping range, and the shift of threshold voltage due to projected range and standard projected deviation significantly appears for bottom gate voltage in the region of high doping concentration.

A Study of The Voltage Transfer Function Dependent On Input Conditions For An N-Input NAND Gate (N-Input NAND Gate에서 입력조건에 따른 Voltage Transfer Function에 관한 연구)

  • Kim In-Mo;Song Sang-Hun;Kim Soo-Won
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.10
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    • pp.510-514
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    • 2004
  • In this paper, we analytically examine the voltage transfer function dependent on input conditions for an N-Input NAND Gate. The logic threshold voltage, defined as a voltage at which the input and the output voltage become equal, changes as the input condition changes for a static NAND Gate. The logic threshold voltage has the highest value when all the N-inputs undergo transitions and it has the lowest value when only the last input connected to the last NMOS to ground, makes a transition. This logic threshold voltage difference increases as the number of inputs increases. Therefore, in order to provide a near symmetric voltage transfer function, a multistage N-Input Gate consisting of 2-Input Logic Gates is desirable over a conventional N-Input Gate.

Analysis of Threshold Voltage for Double Gate MOSFET of Symmetric and Asymmetric Oxide Structure (대칭 및 비대칭 산화막 구조의 이중게이트 MOSFET에 대한 문턱전압 분석)

  • Jung, Hakkee;Kwon, Ohshin;Jeong, Dongsoo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.755-758
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    • 2014
  • This paper has analyzed the change of threshold voltage for oxide structure of symmetric and asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET can be fabricated with different top and bottom gate oxide thickness, while the symmetric DGMOSFET has the same top and bottom gate oxide thickness. Therefore optimum threshold voltage is considered for top and bottom gate oxide thickness of asymmetric DGMOSFET, compared with the threshold voltage of symmetric DGMOSFET. To obtain the threshold voltage, the analytical potential distribution is derived from Possion's equation, and Gaussian distribution function is used as doping profile. We investigate for bottom gate voltage, channel length and thickness, and doping concentration how top and bottom gate oxide thickness influences on threshold voltage using this threshold voltage model. As a result, threshold voltage is greatly changed for oxide thickness, and we know the changing trend very differs with bottom gate voltage, channel length and thickness, and doping concentration.

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Implementation of Stretched-Exponential Time Dependence of Threshold Voltage Shift in SPICE (Stretched-Exponential 형태의 문턱전압 이동 모델의 SPICE구현)

  • Jung, Taeho
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.1
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    • pp.61-66
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    • 2020
  • Threshold voltage shift occurring during operation is implemented in a SPICE simulation tool. Among the shift models the stretched-exponential function model, which is frequently observed from both single-crystal silicon and thin-film transistors regardless of the nature of causes, is selected, adapted to transient simulation, and added to BSIM4 developed by BSIM Research Group at the University of California, Berkeley. The adaptation method used in this research is to select degradation and recovery models based on the comparison between the gate and threshold voltages. The threshold voltage shift is extracted from SPICE transient simulation and shows the stretched-exponential time dependence for both degradation and recovery situations. The implementation method developed in this research is not limited to the stretched-exponential function model and BSIM model. The proposed method enables to perform transient simulation with threshold voltage shift in situ and will help to verify the reliability of a circuit.

Scaling theory to minimize the roll-off of threshold voltage for ultra fine MOSFET (미세 구조 MOSFET에서 문턱전압 변화를 최소화하기 위한 최적의 스켈링 이론)

  • 정학기;김재홍;고석웅
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.4
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    • pp.719-724
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    • 2003
  • In this paper, we have presented the simulation results about threshold voltage of nano scale lightly doped drain (LDD) MOSFET with halo doping profile. Device size is scaled down from 100nm to 40nm using generalized scaling. We have investigated the threshold voltage for constant field scaling and constant voltage scaling using the Van Dort Quantum Correction Model (QM) and direct tunneling current for each gate oxide thickness. We know that threshold voltage is decreasing in the constant field scaling and increasing in the constant voltage scaling when gate length is reducing, and direct tunneling current is increasing when gate oxide thickness is reducing. To minimize the roll off characteristics for threshold voltage of MOSFET with decreasing channel length, we know $\alpha$ value must be nearly 1 in the generalized scaling.

Scaling theory to minimize the roll-off of threshold voltage for nano scale MOSFET (나노 구조 MOSFET의 문턱전압 변화를 최소화하기 위한 스케일링 이론)

  • 김영동;김재홍;정학기
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.11a
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    • pp.494-497
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    • 2002
  • In this paper, we have presented the simulation results about threshold voltage of nano scale lightly doped drain (LDD) MOSFET with halo doping profile. Device size is scaled down from 100nm to 40nm using generalized scaling. We have investigated the threshold voltage for constant field scaling and constant voltage scaling using the Van Dort Quantum Correction Model(QM) and direct tunneling current for each gate oxide thickness. We know that threshold voltage is decreasing in the constant field scaling and increasing in the constant voltage scaling when gate length is reducing, and direct tunneling current is increasing when gate oxide thickness is reducing. To minimize the roll-off characteristics for threshold voltage of MOSFET with decreasing channel length, we know u value must be nearly 1 in the generalized scaling.

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Analysis of Channel Doping Profile Dependent Threshold Voltage Characteristics for Double Gate MOSFET (이중게이트 MOSFET에서 채널도핑분포의 형태에 따른 문턱전압특성분석)

  • Jung, Hak-Kee;Han, Ji-Hyung;Lee, Jae-Hyung;Jeong, Dong-Soo;Lee, Jong-In;Kwon, Oh-Shin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.6
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    • pp.1338-1342
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    • 2011
  • In this paper, threshold voltage characteristics have been analyzed as one of short channel effects occurred in double gate(DG)MOSFET to be next-generation devices. The Gaussian function to be nearly experimental distribution has been used as carrier distribution to solve Poisson's equation, and threshold voltage has been investigated according to projected range and standard projected deviation, variables of Gaussian function. The analytical potential distribution model has been derived from Poisson's equation, and threshold voltage has been obtained from this model. Since threshold voltage has been defined as gate voltage when surface potential is twice of Fermi potential, threshold voltage has been derived from analytical model of surface potential. Those results of this potential model are compared with those of numerical simulation to verify this model. As a result, since potential model presented in this paper is good agreement with numerical model, the threshold voltage characteristics have been considered according to the doping profile of DGMOSFET.

Threshold Voltage Movement for Channel Doping Concentration of Asymmetric Double Gate MOSFET (도핑농도에 따른 비대칭 이중게이트 MOSFET의 문턱전압이동현상)

  • Jung, Hakkee;Lee, jongin;Jeong, Dongsoo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.748-751
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    • 2014
  • This paper has analyzed threshold voltage movement for channel doping concentration of asymmetric double gate(DG) MOSFET. The asymmetric DGMOSFET is generally fabricated with low doping channel and fully depleted under operation. Since impurity scattering is lessened, asymmetric DGMOSFET has the adventage that high speed operation is possible. The threshold voltage movement, one of short channel effects necessarily occurred in fine devices, is investigated for the change of channel doping concentration in asymmetric DGMOSFET. The analytical potential distribution of series form is derived from Possion's equation to obtain threshold voltage. The movement of threshold voltage is investigated for channel doping concentration with parameters of channel length, channel thickness, oxide thickness, and doping profiles. As a result, threshold voltage increases with increase of doping concentration, and that decreases with decrease of channel length. Threshold voltage increases with decrease of channel thickness and bottom gate voltage. Lastly threshold voltage increases with decrease of oxide thickness.

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