• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.1
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• pp.44-48
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• 2013

Niobium oxide($Nb_2O_5$) films were deposited on p-type Si wafers at room temperature using in-line pulsed-DC magnetron sputtering system with various frequencies. The different duty ratios were obtained by varying the frequency of pulsed DC power from 100 to 300 kHz at the fixed reverse time of $1.5{\mu}s$. From the thickness of the sputtered $NbO_x$ films, it was possible to obtain much higher deposition rate in case of pulsed-DC sputtering than RF sputtering. However, the similar leakage currents and structural characteristics were obtained from the metal-insulator-semiconductor(MIS) structure fabricated with the $NbO_x$ films and the x-ray photoelectron spectroscopy(XPS) results in spite of the different deposition rates. From the experimental results, the $NbO_x$ films sputtered by pulsed-DC sputtering are expected to be used in the fabrication process instead of RF sputtering.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.11
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• pp.1311-1316
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• 2014

To be used in a transmitter of a satellite transponder of this paper, X band 25W power amplifier module, a part constituting of high-power amplifier is transmitted to the equipment for transmitting to geostationary communications satellites(36,000Km distance). PAM consisted a total of four power amplifier module has a high output characteristic of the high-output amplifier is used in the ground station. Used in conjunction with the structured type power amplifier module is composed of Serial Combining Structure. This PAM(Power Amplifier Module) configured by combining the circuit with the power amplifier, 10 MMIC chips and the Al2O3 thin film substrate using a Hybrid Technique of power amplifier module, was implemented at X band PAM(Power Amplifier Module) of 25W grade.

• Electrical & Electronic Materials
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• v.9 no.1
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• pp.30-37
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• 1996

Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

• Journal of the Korean institute of surface engineering
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• v.43 no.3
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• pp.148-153
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• 2010

Transparent conducting films having a hybrid structure of GZO/Metal/GZO were prepared on glass substrates by sequential deposition using DC magnetron sputtering. Silver, copper, aluminum and zinc thin films were used as the intermediate metal layers in the hybrid structure. The electrical and optical properties of hybrid transparent conducting films were investigated with varying the thickness of metal layer or GZO layers. With increasing the metal thickness, hybrid films showed a noticeable improvement of the electrical conductivity, which is mainly dependent on the electrical property of the metal layer. GZO(40 nm)/Ag(10 nm)/GZO(40 nm) film exhibits a resistivity of $5.2{\times}10^{-5}{\Omega}{\cdot}cm$ with an optical transmittance of 82.8%. For the films with Zn interlayer, only marginal reduction in the resistivity was observed. Furthermore, unlike other metals, hybrid films with Zn interlayer showed a decrease in the resistivity with increasing the GZO thickness. The optimal thickness of GZO layer for anti-reflection effect at a given thickness of metal (10 nm) was found to be critically dependent on the refractive index of the metal. In addition, x-ray diffraction analysis showed that the insertion of Ag layer resulted in the improvement of crystallinity of GZO films, which is beneficial for the electrical and optical properties of hybrid-type transparent conducting films.

• Journal of Sensor Science and Technology
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• v.8 no.5
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• pp.421-426
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• 1999

In this paper, we present p-channel GaAs MOSFET having $Al_2O_3$ as gate insulator fabricated on a semi-insulating GaAs substrate, which can be operated in the depletion mode. $1\;{\mu}m$ thick undoped GaAs buffer layer, $4000\;{\AA}$ thick p-type GaAs epi-layer, undoped $500{\AA}$ thick AlAs layer, and $50\;{\AA}$ thick GaAs cap layer were subsequently grown by molecular beam epitaxy(MBE) on (100) oriented semi-insulating GaAs substrate and this wafer was oxidized. AlAs layer was fully oxidized as a $Al_2O_3$ thin film. The I-V, $g_m$, breakdown charateristics of the fabricated GaAs MOSFET showed that wet thermal oxidation of AlAs/GaAs epilayer/S I GaAs was successful in realizing depletion mode p-channel GaAs MOSFET.

• Journal of Sensor Science and Technology
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• v.5 no.5
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• pp.69-77
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• 1996

In this paper, we fabricated the micro hotplate which consisted of a thin film heater(Pt/Cr bilayers) sandwiched with the thermal oxide and E-beam evaporated oxide. And we studied the electrical and the structural properties of Pt/Cr bilayers due to annealing temperature. When we compared the temperature measured from type k thermocouples with the temperature acquired from I.R. thermo-vision system according to the variations of emissivity, the emissivity of I-beam evaporated oxide was 0.5. The sheet resistance of Pt/Cr bilayers didn't depend on the Cr layer thickness, and it was considered as the existence of CrO between the Pt and the Cr layer. When the annealing temperature was increased from $500^{\circ}C$ to $700^{\circ}C$, the out-diffusions of Cr were increased(which was confirmed by AES depth profile) and the grain size of Pt(220) phase was enlarged also(analyzed by XRD and SEM photographs). From the results of XRD analysis and AES depth profile, the Pt/Cr bilayers annealed at $500^{\circ}C$ were more stable than any other cases in structural properties.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.6
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• pp.130-136
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• 2002

A novel ozonizer has been developed using a high frequency surface discharge and a high purity Ti-Si-Al ceramic catalyst as its dielectric component. A cylindrical thin compound ceramic catalyst in reactor is adhered to inside of the film-like outside electrode. And, when experiment condition are oxygen gas temperature of 20 ［$^{\circ}C$］, inner reactor pressure of 1.6 atm 600［Hz］ and flow late of 2［l/min］. the ozonizer can easily produce ozone concentration(50～60［g/㎥］for oxygen) and power efficiency(180［g/kWh］for oxygen) without using a special enrichment means. At 2［l/min］, 20［$^{\circ}C$］, 1.6［atm］, 600［Hz］and 40［W］, the result of simulation to gas temperature of reactor using general code Phoenics, the maximum temperature of reactor was 132［$^{\circ}C$］in reactor. Ant the result electric field simulation of Ti-Si-Al type reactor using general code Flux 2D, maximum electric field was 0.131E.08［V/m］.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.393-396
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• 2004

본 논문에서는 완충층용 MgO 박막을 P-type(100)Si 기판위에 작업가스 $Ar:O_2=80:20$, RF 파워 50W, 기판온도 $400^{\circ}C$, 10mtorr의 작업진공에서 $500{\AA}$ 증착하였다. 제작된 MgO/Si 기판위에 RF Magnetron sputtering법으로 작업가스 $Ar:O_2$의 비율을 90:10, 80:20, 70:30으로 변화하면서 $BST(Ba_{0.5}Sr_{0.5}TiO_3)$ 박막을 약 $2000{\AA}$ 증착하였다. XRD 측정결과 작업가스비의 변화에 관계없이(110)BST와 (111)BST 피크만이 관찰되었으며 작업가스 $Ar:O_2=80:20$에서 가장 양호한 결정성을 나타내었다. I-V 측정결과 인가전계 ${\pm}100kV/cm$에서 $10^{-7}A/cm^2$이하의 양호한 누설전류 특성을 보여주고 있으며 C-V 측정결과 작업가스 $Ar:O_2$의 비율 90:10, 80:20, 70:30에서의 비유전율은 각각 283, 305, 296으로서 작업가스비 80:20에서 제작된 박막의 특성이 가장 우수하였다. 작업가스비 80:20에서 제작된 박막의 SEM 측정결과 결정이 성장되었음을 확인할 수 있었고 그레인의 크기는 약 10nm였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.05a
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• pp.84-87
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• 2005

본 논문에서는 p-type 고분자 물질인 P3HT (Poly-3-hexylthiophene)를 잉크젯 프린팅 방식으로 활성화층을 적층함으로써 Organic thin film transistor를 제작하여 이에 대한 특성을 연구하였다. Piezoelectric 방식의 잉크젯 프린팅을 이용하여 P3HT single drop jetting 시 두께 $150{\sim}200{\AA}$, 직경 약 70 ~ 80 um정도의 drop profile을 얻을 수 있었다. P3HT의 solvent로서 Chlorobenzene을 사용하여 농도 약 0.5 wt.%의 Ink-jet용 ink를 제작하여 이를 Channel Width 37, 236 um 크기의 Au 전극 위에 jetting 하여 각각의 특성을 측정하였다. 상기 실험은 상온의 외부환경에서 실시되었으며 실험 결과 최대 ${\mu}=1{\times}10^{-2}\;cm^2/Vsec$, $I_{on}/I_{off}=10^3{\sim}10^4$ 정도로서 off current가 높은 편이나 이동도 측면에서는 다른 방법의 박막 증착 실험결과와 비교할 때 동등 수준의 결과를 얻을 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.241.2-241.2
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• 2013

최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 MOSFET 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 따라서, 본 연구에서는 RF sputter를 이용하여 증착된 비정질 InGaZnO pesudo MOSFET 소자를 제작하였으며, thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 RF 스퍼터링을 이용하여 InGaZnO 분말을 각각 1:1:2mol% 조성비로 혼합하여 소결한 타겟을 사용하여 70 nm 두께의 InGaZnO를 증착하였다. 연속해서 Photolithography 공정과 BOE(30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 pseudo MOSFET 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 각각 $300^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 20분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave 를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.