• Title/Summary/Keyword: Thin Dielectric Film

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Fabrications and Properties of MFIS Structures using high Dielectric AIN Insulating Layers for Nonvolatile Ferroelectric Memory (고유전율 AIN 절연층을 사용한 비휘발성 강유전체 메모리용 MFIS 구조의 제작 및 특성)

  • Jeong, Sun-Won;Kim, Gwang-Hui;Gu, Gyeong-Wan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.11
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    • pp.765-770
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    • 2001
  • Metal-ferroelectric-insulator- semiconductor(MFTS) devices by using rapid thermal annealed (RTA) LiNbO$_3$/AIN/Si(100) structures were successfully fabricated and demonstrated nonvolatile memory operations. Metal-insulator-semiconductor(MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2 V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/$\textrm{cm}^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8 V, 50 % duty cycle) in the 500 kHz.

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Evaluation and Comparison of Nanocomposite Gate Insulator for Flexible Thin Film Transistor

  • Kim, Jin-Su;Jo, Seong-Won;Kim, Do-Il;Hwang, Byeong-Ung;Lee, Nae-Eung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.278.1-278.1
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    • 2014
  • Organic materials have been explored as the gate dielectric layers in thin film transistors (TFTs) of backplane devices for flexible display because of their inherent mechanical flexibility. However, those materials possess some disadvantages like low dielectric constant and thermal resistance, which might lead to high power consumption and instability. On the other hand, inorganic gate dielectrics show high dielectric constant despite their brittle property. In order to maintain advantages of both materials, it is essential to develop the alternative materials. In this work, we manufactured nanocomposite gate dielectrics composed of organic material and inorganic nanoparticle and integrated them into organic TFTs. For synthesis of nanocomposite gate dielectrics, polyimide (PI) was explored as the organic materials due to its superior thermal stability. Candidate nanoprticles (NPs) of halfnium oxide, titanium oxide and aluminium oxide were considered. In order to realize NP concentration dependent electrical characteristics, furthermore, we have synthesized the different types of nanocomposite gate dielectrics with varying ratio of each inorganic NPs. To analyze gate dielectric properties like the capacitance, metal-Insulator-metal (MIM) structures were prepared together with organic TFTs. The output and transfer characteristics of organic TFTs were monitored by using the semiconductor parameter analyzer (HP4145B), and capacitance and leakage current of MIM structures were measured by the LCR meter (B1500, Agilent). Effects of mechanical cyclic bending of 200,000 times and thermally heating at $400^{\circ}C$ for 1 hour were investigated to analyze mechanical and thermal stability of nanocomposite gate dielectrics. The results will be discussed in detail.

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Advanced Low-k Materials for Cu/Low-k Chips

  • Choi, Chi-Kyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.71-71
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    • 2012
  • As the critical dimensions of integrated circuits are scaled down, the line width and spacing between the metal interconnects are made smaller. The dielectric film used as insulation between the metal lines contributes to the resistance-capacitance (RC) time constant that governs the device speed. If the RC time delay, cross talk and lowering the power dissipation are to be reduced, the intermetal dielectric (IMD) films should have a low dielectric constant. The introduction of Cu and low-k dielectrics has incrementally improved the situation as compared to the conventional $Al/SiO_2$ technology by reducing both the resistivity and the capacitance between interconnects. Some of the potential candidate materials to be used as an ILD are organic and inorganic precursors such as hydrogensilsequioxane (HSQ), silsesquioxane (SSQ), methylsilsisequioxane (MSQ) and carbon doped silicon oxide (SiOCH), It has been shown that organic functional groups can dramatically decrease dielectric constant by increasing the free volume of films. Recently, various inorganic precursors have been used to prepare the SiOCH films. The k value of the material depends on the number of $CH_3$ groups built into the structure since they lower both polarity and density of the material by steric hindrance, which the replacement of Si-O bonds with Si-$CH_3$ (methyl group) bonds causes bulk porosity due to the formation of nano-sized voids within the silicon oxide matrix. In this talk, we will be introduce some properties of SiOC(-H) thin films deposited with the dimethyldimethoxysilane (DMDMS: $C_4H_{12}O_2Si$) and oxygen as precursors by using plasma-enhanced chemical vapor deposition with and without ultraviolet (UV) irradiation.

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A study on the characteristics of BST thin films with various Ba/Sr Ratio (조성변화에 따른 BST 박막의 특성에 관한연구)

  • 류정선;강성준;윤영섭
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.6
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    • pp.120-126
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    • 1996
  • In the present study, we have studied on the characteristics of BST thin films with various Ba/Sr ratios by using sol-gel method. Barium-acetate, strontium-acetate and titanium isopropoxide are used as starting materials to fabricate BST thin films by sol-gel method. The fabrication conditions are estabilished through the TG-dT analyses and XRD measurements. BST thin films with the Ba/Sr ratios of 90/10, 70/30, 50/50 and 30/70 were deposited on the Pt/Ta/SiO$_{2}$Si substrate with the estabilished sol-gel process, and their characteristics were examined. The relative permittivity and the leakage current density at 5V vary from 287 to 395 and from 2.3 to 220${\mu}$A/cm$^{2}$, respectively, with various Ba/Sr ratio. Among the films investigatd in this research, BST (70/30) thin film shows the best relative permittivity and dielectric loss of BST (70/30) thin film are 395 and 0.045, respectively and the leakage current density at 5V is 2.3${\mu}$A/cm$^{2}$.

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Effects of Annealing Atmosphere on Crystallization and Electrical Properties in $YMnO_3$ Ferroelectric Thin Films ($YMnO_3$ 강유전 박막의 열처리 분위기가 결정화거동과 전기적 특성에 미치는 영향)

  • 윤귀영;김정석;천채일
    • Journal of the Korean Ceramic Society
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    • v.37 no.2
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    • pp.168-173
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    • 2000
  • YMnO3 thin films were prepared on Pt/Ti/SiO2/Si substrate by chemical solution deposition method. The films were crystallized by heat-treatment at 85$0^{\circ}C$ for 1 hour. Effects of an annealing atmosphere(O2, Ar, vacuum) on the crystallization behavior and electridcal properties were investigated. YMnO3 thin films annealed under Ar atmosphere showed a superior crystallinity and a very strong c-aix preferred-orientation which was a polar axis. Leakage current density of the films decreased with lowering oxygen partial pressure of the annealing atmosphere. C-V and P-E ferroelectric hysteresis were observed only in the thin film heat-treated under Ar atmosphere.In order to prepare YMnO3 thin films having both low leakage current and ferroelectricity, the annealing atmsphere should be kept under a proper oxygen partial pressure which was about 1 Pa in this work. Leakage current density at 1 volt, dielectric constant($\varepsilon$r), remanent polarization(Pr), and coercive field(Ec) were 1.7$\times$10-8 A/$\textrm{cm}^2$, 25, 1.08$\mu$C/$\textrm{cm}^2$, and 100 kV/cm, respectively.

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Organic Thin Film Transistors for Liquid Crystal Display Fabricated with Poly 3-Hexylthiophene Active Channel Layer and NiOx Electrodes

  • Oh, Yong-Cheul
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.12
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    • pp.1140-1143
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    • 2006
  • We report on the fabrication of P3HT-based thin-film transistors (TFTs) for liquid crystal display that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (S/D) electrodes, gate dielectric layer, and gate electrode, respectively The $NiO_x$ S/D electrodes of which the work function is well matched to that of P3HT are deposited on a P3HT channel by electron-beam evaporation of NiO powder. The maximum saturation current of our P3HT-based TFT is about $15{\mu}A$ at a gate bias of -30 V showing a high field effect mobility of $0.079cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^5$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality P3HT-based TFT.

Device characterization and Fabrication Issues for Ferroelectric Gate Field Effect Transistor Device

  • Yu, Byoung-Gon;You, In-Kyu;Lee, Won-Jae;Ryu, Sang-Ouk;Kim, Kwi-Dong;Yoon, Sung-Min;Cho, Seong-Mok;Lee, Nam-Yeal;Shin, Woong-Chul
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.3
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    • pp.213-225
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    • 2002
  • Metal-Ferroelectric- Insulator- Silicon (MFIS) structured field effect transistor (FET) device was fabricated and characterized. Important issues to realize ferroelectric gate field effect transistor device were summarized in three sections. The choice of interlayer dielectric was made in the consideration of device functionality and chemical reaction between ferroelectric materials and silicon surface during fabrication process. Also, various ferroelectric thin film materials were taken into account to meet desired memory window and process compatibility. Finally, MFIS structured FET device was fabricated and important characteristics were discussed. For feasible integration of current device as random access memory array cell address schemes were also suggested.

ELECTRICAL CHARACTERISTICS OF PENTACENE THIN FILM TRANSISTORS WITH STACKED AND SURFACE-TREATED GATE INSULATORS (러빙 처리된 표면의 적층 절연막을 가지는 Pentacene TFT의 전기적 특성)

  • Kang, Chang-Heon;Lee, Jong-Hyuk;Park, Jae-Hoon;Choi, Jong-Sun
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1546-1548
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    • 2002
  • In this paper, the electrical characteristics of pentacene thin film transistors(TFTs) with stacked and surface-treated gate insulators have been investigated. The semiconductor layer of pentacene was thermally evaporated onto the stacked gate insulators. For the gate insulating materials. PVP(PolyvinylPhenol) and polystyrene were spin-coated with two different stacking orders, PVP-polystyrene and polystyrene-PVP. Rapid solvent evaporation during the spin-coating processes of these insulating layers produces non-equilibrium phase morphologies accompanied by surface undulations on gate insulator interfaces. This non-equilibrium phase morphology affects the growth mode of the subsequent pentacene layer. Therefore, in order to smoothen the gate dielectric surfaces, gate dielectric surfaces were rubbed laterally along the direction from the drain to the source TFTs with with stacked and surface-treated gate insulators have provided improved operational characteristics.

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Fabrication of Thin Film Transistor Using Ferroelectrics

  • Hur, Chang-Wu;Kim, Jung-Tae
    • Journal of information and communication convergence engineering
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    • v.2 no.2
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    • pp.93-96
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    • 2004
  • The a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_{3}N_{4}$. Ferroelectric increases on-current, decreases threshold voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, retractive index of 1.8∼2.0 and resistivity of $10^{13}$~$10^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60∼100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8∼20 $\mu\textrm{m}$ and channel width of 80∼200 $\mu\textrm{m}$. And it shows that drain current is 3.4$\mu\textrm{A}$ at 20 gate voltage, $I_{on}$/$I_{off}$ is a ratio of $10^5$~$10^8$ and $V_{th}$ is 4∼5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $\mu\textrm{A}$ at 20 gate voltage and $V_{th}$ is 5∼6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.

The Characteristics of $PbTiO_{3}-PbZrO_{3}-Pb(Ni_{1/3}Nb_{2/3})O_{3}$ Piezoelectric Thin Film Made by Sol-Gel Method (Sol-Gel 법으로 제작한 $PbTiO_{3}-PbZrO_{3}-Pb(Ni_{1/3}Nb_{2/3})O_{3}$ 압전박막의 특성)

  • Yoon, Wha-Joong;Lim, Moo-Yeol;Koo, Kyung-Wan
    • Journal of Sensor Science and Technology
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    • v.4 no.4
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    • pp.75-80
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    • 1995
  • In order to fabricate the piezoelectric thin film of the PZT-PNN ternary compound, the metal alkoxides were used as starting materials. The electrical and crystalline properties of the thin film were evaluated. The X- RD study shows that the crystallization of the film is optimized at $550^{\circ}C$ of sintering temperature. According to the D-E hysterisis curve, the coercive field is 28.8 kV /cm, and the remanent polariztion is $18.3\;{\mu}C/cm^{2}$. The break down voltages of the thin films are $76.0\;{\sim}\;27.0\;MV/m$. When the sintering temperature is raised, the break down voltage is lowered. As a result of measuring the C-V characteristic curve of the ternary compound piezoelectric thin film, the relative dielectric constants are 406 for the composition (50:40:10), 1084 for the composition (50:30:20), 723 for the composition (45:35:20) and 316 for the composition (40:40:20).

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