JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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Device characterization and Fabrication Issues for Ferroelectric Gate Field Effect Transistor Device

  • Yu, Byoung-Gon (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI)) ;
  • You, In-Kyu (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI)) ;
  • Lee, Won-Jae (Research Center of Electronic Ceramics(RCEC), Department of Advanced Materials Engineering, Dong-Eui University) ;
  • Ryu, Sang-Ouk (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI)) ;
  • Kim, Kwi-Dong (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI)) ;
  • Yoon, Sung-Min (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI)) ;
  • Cho, Seong-Mok (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI)) ;
  • Lee, Nam-Yeal (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI)) ;
  • Shin, Woong-Chul (Basic Research Lab., Electronics and Telecommunications Research Institute(ETRI))
  • Published : 2002.09.01
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Abstract

Metal-Ferroelectric- Insulator- Silicon (MFIS) structured field effect transistor (FET) device was fabricated and characterized. Important issues to realize ferroelectric gate field effect transistor device were summarized in three sections. The choice of interlayer dielectric was made in the consideration of device functionality and chemical reaction between ferroelectric materials and silicon surface during fabrication process. Also, various ferroelectric thin film materials were taken into account to meet desired memory window and process compatibility. Finally, MFIS structured FET device was fabricated and important characteristics were discussed. For feasible integration of current device as random access memory array cell address schemes were also suggested.

Keywords

References

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