• 한국생산제조학회지
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• 제23권3호
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• pp.230-236
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• 2014

Wafer level package technology is added to the surface of wafer circuit packages to create a semiconductor technology that can minimize the size of the package. However, in conventional packaging, warpage and fracture are major concerns for semiconductor manufacturing. We optimized the wafer dam design using a finite element method according to the dam height and heat distribution thermal properties. The dam design influences the uniform deposition of the image sensor and prevents the filling material from overflowing. In this study, finite element analysis was employed to determine the key factors that may affect the reliability performance of the dam package. Three-dimensional finite element models were constructed using the simulation software ANSYS to perform the dam thermo-mechanical simulation and analysis.

• 대한기계학회논문집A
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• 제33권4호
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• pp.337-345
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• 2009

This paper investigates the reliability of district heating pipes at thermo-elastic fatigue loading. District heating pipes, subjected to $120^{\circ}C$ and $16kg_f/cm^2$ due to water distributing service through inside the pipes, should endure long term cyclic thermal-mechanical loadings. The heating pipes are the co-centric tubes of steel pipe, poly urethane(PUR) insulator, and high density poly ethylene(HDPE) case. On installation, foam pad is externally wrapped for accommodating stress reduction near the bend sections of pipes. However, there have been frequent reports on the failures of bend sections in the middle of long term service. This study scrutinizes the observed failures near the bend sections through applying the finite element methods. Specially in this study, heating pipes are studied on the influence of foam padding on failures and proposed new designs for reinforced bend without foam pad.

• 마이크로전자및패키징학회지
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• 제16권2호
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• pp.43-50
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• 2009

최근 인쇄회로기판(PCB)의 제품트랜드는 박형화, 고밀도화로 대표되지만 휨(Warpage) 억제, 신뢰성확보와 같은 기술적 난제로 인해 박형화와 고밀도화에 많은 제약을 받고 있다. $B^2it$(Buried Bump Interconnection Technology) 공법은 기판의 핵심공정 중 하나인 드릴링 공정이 생략되어 인쇄회로기판을 낮은 제조비용으로 박형화할 수 있는 기술로 개발되고 있다. 본 논문은 $B^2it$공법이 적용된 인쇄회로기판의 열적-기계적 거동특성을 유한요소해석(FEA)을 통해 고찰한 논문으로서 패키징레벨에서 방열효과와 신뢰성 등에 벙프의 재료, 형상 등이 미치는 영향 등을 분석하였다. 해석결과에 의하면 $B^2it$공법이 적용한 인쇄회로기판은 기존 비아구조를 가진 인쇄회로기판에 비해 칩에서 발생하는 열의 확산이 신속하고 패키징의 휨을 억제하는데도 유리하며 칩에서 발생하는 응력도 낮추지만 솔더-조인트의 응력은 증가시키게 된다. 따라서 패키징의 신뢰성을 향상시키기 위해서는 범프의 형상, 재료 등을 패키징을 구성하고 있는 모든 요소들을 고려하여 최적화하는 것이 필요하다.

• 한국세라믹학회지
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• 제43권9호
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• pp.515-518
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• 2006

The microstructure of $ZrO_2$ toughened $Al_2O_3$ ceramics was carefully controlled so as to obtain dense and fine-grained ceramics, thereby improving the properties and reliability of the ceramics for capillary applications in semiconductor bonding technology. $Al_2O_3-ZrO_2(Y_2O_3)$ composite was produced via Ceramic Injection Molding (CIM) technology, followed by Sinter-HIP process. Room temperature strength, hardness, Young's modulus, thermal expansion coefficient and toughness were determined, as well as surface strengthening induced by the fine grained homogenous microstructure and the thermal treatment. The changes in alumina/zirconia grain size, sintering condition and HIP treatment were found to be correlated.

• Steel and Composite Structures
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• 제44권2호
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• pp.171-181
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• 2022

Functionally graded material (FGM) has been spotlighted as an advanced composite material due to its excellent thermo-mechanical performance. And the buckling of FGM resting on elastic foundations has been a challenging subject because its behavior is directly connected to the structural safety. In this context, this paper is concerned with a numerical buckling analysis of metal-ceramic FG plates resting on a two-parameter (Pasternak-type) elastic foundation. The buckling problem is formulated based on the neutral surface and the (1,1,0) hierarchical model, and it is numerically approximated by 2-D natural element method (NEM) which provides a high accuracy even for coarse grid. The derived eigenvalue equations are solved by employing Lanczos and Jacobi algorithms. The numerical results are compared with the reference solutions through the benchmark test, from which the reliability of present numerical method has been verified. Using the developed numerical method, the critical buckling loads of metal-ceramic FG plates are parametrically investigated with respect to the major design parameters.

• 마이크로전자및패키징학회지
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• 제17권3호
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• pp.17-26
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• 2010

반도체 패키지에 사용되고 있는 유연 솔더는 환경 보호 필요성 대문에 무연 솔더로 빠르게 대체되고 있다. 이와 같은 무연 솔더에 대한 여구는 주로 재료의 발견과 공정 적응성의 관점에서 이루어졌을 뿐, 기계적인 성질이나 신뢰성의 관점에서의 연구는 많이 이루어지지 않았다. 본 논문에서는 무아레 간섭계를 이용하여 유연 솔더와 무연 솔더 실장 WB-PBGA 패키지 결합체의 온도변화에 대한 열-기게적 거동을 해석하였다. 실시간 무아레 간섭계를 이용하여 각 온도 단계에서 변위 분포를 나타내는 간섭무늬를 얻고, 그로부터 유연과 무연의 솔더 조인트를 갖는 WB-PBGA 패키지의 굽힘 변형 거동 및 솔더 볼의 변형률을 비교 분석하였다. 분석결과를 보면 유연 솔더 실장 패키지 결합체의 솔더 볼은 칩경계 부근인 #3 솔더 볼에서 발생하는 전단변형률이 파손에 큰 영향을 미치며, 무연 솔더가 실장된 패키지 결합체의 솔더 볼은 가장 바깥 부근인 #7 솔더 볼에서 발행하는 수직 변형률이 파손에 큰 영향을 미칠 것으로 예측된다, 또한 무연 솔더 실장 패키지 결합체는 같은 온도 조건에서 유연 솔더 실장된 패키지에 비해 굽힘 변형이 휠씬 크게 발생될 뿐 아니라 솔더 볼의 유효변형률도 10% 정도 크게 발생하는 것으로 나타나서 열변형에 의한 파손에 취약할 것으로 예측된다.

• 한국터널지하공간학회 논문집
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• 제21권4호
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• pp.501-518
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• 2019

심부 지하환경 조건에서 측정된 암석물성의 사용은 고준위폐기물처분장의 장기 안전성 평가 측면에서 해석의 신뢰성을 향상시킬 수 있다. 본 연구는 지하처분연구시설(Korea atomic energy research institute Underground Research Tunnel, KURT)의 화강암(한국원자력연구원, 대전)을 대상으로 고준위폐기물 처분장에서 예상되는 복합환경 조건을 구현한 후 암석의 역학적 물성 변화를 측정하였다. 실험은 심지층 처분환경이 모사되도록 열-수리-역학적 복합 환경(Thermo-Hydro-Mechanical, THM)이 조절될 수 있는 실험장치를 제작하였다. 다양한 복합 실험조건(M, HM, TM, THM)을 구현하여 일축압축강도와 간접인장강도, 탄성계수, 포와송비 등의 암석물성을 측정한 후 그 결과를 분석하였다. 실험결과, 처분장 근계암반 예상 온도범위 내에서는 KURT 화강암의 역학적 물성이 온도의 영향 보다 포화유무에 따른 변화가 더 큰 것을 확인할 수 있었다. 또한, 동일한 온도 조건에서 포화 유무에 따른 일축압축시험 결과는 최대 약 20%의 상대적인 차이를 보였으며, 간접인장시험 결과는 최대 13%의 차이가 발생하였다. 따라서 처분장의 장기거동에 따른 성능평가 및 안전성 예측을 위해서는 기존의 상온 실내시험을 통해 도출된 암석물성을 사용하기보다 심부 지하환경을 반영한 암석의 복합물성을 활용하는 것이 해석의 신뢰도 향상에 기여할 수 있을 것이다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2004년도 ISMP Pb-free solders and the PCB technologies related to Pb-free solders
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• pp.233-241
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• 2004

A new alloy definition will be presented concerning increasing demands for the board level reliability of miniaturized interconnections. The damage mechanism for LFBGA components on different board finishes is not quite understood. Further demands from mobile phones are the drop test, characterizing interface performance of different package constructions in relation to decreased pad constructions and therefore interfaces. The paper discusses the characterization of interfaces based on SnPb, SnPbXYZ, SnAgCu and SnAgCuInNd ball materials and SnAgCuInNd as solder paste, the stability after accelerated tests and the description of modified interfaces strictly related to the assembly conditions, dissolution behavior of finishes on board side and the influence of intermetallic formation. The type of intermetallic as well as the quantity of intermetallics are observed, primaliry the hardness, E modules describing the ability of strain/stress compensation. First results of board level reliability are presented after TCT-40/+150. Improvement steps from the ball formulation will be discussed in conjunction to the implementation of lead free materials In order to optimize ball materials for area array devices accelareted aging conditions like TCTs were used to analyze the board level reliability of different ball materials for BGA, LFBGA, CSP, Flip Chip. The paper outlines lead-free ball analysis in comparison to conventional solder balls for BGA and chip size packages. The important points of interest are the description of processability related to existing ball attach procedures, requirements of interconnection properties and the knowledge gained the board level reliability. Both are the primary acceptance criteria for implementation. Knowledge about melting characteristic, surface tension depend on temperature and organic vehicles, wetting behavior, electrical conductivity, thermal conductivity, specific heat, mechanical strength, creep and relaxation properties, interactions to preferred finishes (minor impurities), intermetallic growth, content of IMC, brittleness depend on solved elements/IMC, fatigue resistance, damage mechanism, affinity against oxygen, reduction potential, decontamination efforts, endo-/exothermic reactions, diffusion properties related to finishes or bare materials, isothermal fatigue, thermo-cyclic fatigue, corrosion properties, lifetime prediction based on board level results, compatibility with rework/repair solders, rework temperatures of modified solders (Impurities, change in the melting point or range), compatibility to components and laminates.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2004년도 ISMP Pb-free solders and the PCB technologies related to Pb-free solders
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• pp.211-219
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• 2004

A new alloy definition will be presented concerning increasing demands for the board level reliability of miniaturized interconnections. The damage mechanism for LFBGA components on different board finishes is not quite understood. Further demands from mobile phones are the drop test, characterizing interface performance of different package constructions in relation to decreased pad constructions and therefore interfaces. The paper discusses the characterization of interfaces based on SnPb, SnPbXYZ, SnAgCu and SnAgCuInNd ball materials and SnAgCuInNd as solder paste, the stability after accelerated tests and the description of modified interfaces stric시y related to the assembly conditions, dissolution behavior of finishes on board side and the influence of intermetallic formation. The type of intermetallic as well as the quantity of intermetallics are observed, primaliry the hardness, E modules describing the ability of strain/stress compensation. First results of board level reliability are presented after TCT-40/+150. Improvement steps from the ball formulation will be discussed in conjunction to the implementation of lead free materials. In order to optimize ball materials for area array devices accelareted aging conditions like TCTs were used to analyze the board level reliability of different ball materials for BGA, LFBGA, CSP, Flip Chip. The paper outlines lead-free ball analysis in comparison to conventional solder balls for BGA and chip size packages. The important points of interest are the description of processability related to existing ball attach procedures, requirements of interconnection properties and the knowledge gained the board level reliability. Both are the primary acceptance criteria for implementation. Knowledge about melting characteristic, surface tension depend on temperature and organic vehicles, wetting behavior, electrical conductivity, thermal conductivity, specific heat, mechanical strength, creep and relaxation properties, interactions to preferred finishes (minor impurities), intermetallic growth, content of IMC, brittleness depend on solved elements/IMC, fatigue resistance, damage mechanism, affinity against oxygen, reduction potential, decontamination efforts, endo-/exothermic reactions, diffusion properties related to finishes or bare materials, isothermal fatigue, thermo-cyclic fatigue, corrosion properties, lifetime prediction based on board level results, compatibility with rework/repair solders, rework temperatures of modified solders (Impurities, change in the melting point or range), compatibility to components and laminates.

• 마이크로전자및패키징학회지
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• 제12권1호
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• pp.9-16
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• 2005

This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.