• 제목/요약/키워드: Temperature swing

검색결과 101건 처리시간 0.028초

Floating Inverter Amplifiers with Enhanced Voltage Gains Employing Cross-Coupled Body Biasing

  • Jae Hoon Shim
    • 센서학회지
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    • 제33권1호
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    • pp.12-17
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    • 2024
  • Floating inverter amplifiers (FIAs) have recently garnered considerable attention owing to their high energy efficiency and inherent resilience to input common-mode voltages and process-voltage-temperature variations. Since the voltage gain of a simple FIA is low, it is typically cascaded or cascoded to achieve a higher voltage gain. However, cascading poses stability concerns in closed-loop applications, while cascoding limits the output swing. This study introduces a gain-enhanced FIA that features cross-coupled body biasing. Through simulations, it is demonstrated that the proposed FIA designed using a 28-nm complementary metal-oxide-semiconductor technology with a 1-V power supply can achieve a high voltage gain (> 90 dB) suitable for dynamic open-loop applications. The proposed FIA can also be used as a closed-loop amplifier by adjusting the amount of positive feedback due to the cross-coupled body biasing. The capability of achieving a high gain with minimum-length devices makes the proposed FIA a promising candidate for low-power, high-speed sensor interface systems.

Effects of thickness of GIZO active layer on device performance in oxide thin-film-transistors

  • Woo, C.H.;Jang, G.J.;Kim, Y.H.;Kong, B.H.;Cho, H.K.
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.137-137
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    • 2009
  • Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

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다결정 실리콘 박막 트랜지스터의 온도 의존성 (Temperature-Dependence of Poly-Si Thin film Transistors)

  • 이정석;이용재
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 1999년도 춘계종합학술대회
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    • pp.403-406
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    • 1999
  • 고상결정화(SPC)로 제작된 다결정 박막의 전기적 특성 변화를 측정함으로서 다결정 박막 트랜지스터(poly-Si TFT's)에 대한 온도 변화 (25~1$25^{\circ}C$)의 영향을 연구하였다. 채널 길이가 각각 1.5, 10 $\mu\textrm{m}$인 SPC로 제작된 n-채널 poly-Si TFT는 온도 변화에도 불구하고 높은 전계 효과 이동도 ($\mu$$_{FE}$ : 1.5와 10$\mu\textrm{m}$에서 각각 $\geq$82 and $\geq$60$\textrm{cm}^2$/V-s), 낮은 문턱전압 (V$_{th}$ : 1.5 와 10$\mu\textrm{m}$에서 각각 $\leq$ 1.52 and $\leq$ 2.75V), 낮은 Subthreshold swing (S$_{t}$), 그리고 양호한 ON-OFF 특성이 나타났다. 따라서, SPC로 제작된 poly-Si TFT는 액정표시장치의 주변회로에 적용할 수 있다.

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Effect of Annealing Temperature on the Electrical Performance of SiZnSnO Thin Film Transistors Fabricated by Radio Frequency Magnetron Sputtering

  • Kim, Byoungkeun;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • 제18권1호
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    • pp.55-57
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    • 2017
  • Amorphous oxide thin film transistors (TFTs) were fabricated with 0.5 wt% silicon doped zinc tin oxide (a-0.5SZTO) thin film deposited by radio frequency (RF) magnetron sputtering. In order to investigate the effect of annealing treatment on the electrical properties of TFTs, a-0.5SZTO thin films were annealed at three different temperatures ($300^{\circ}C$, $500^{\circ}C$, and $700^{\circ}C$ for 2 hours in a air atmosphere. The structural and electrical properties of a-0.5SZTO TFTs were measured using X-ray diffraction and a semiconductor analyzer. As annealing temperature increased from $300^{\circ}C$ to $500^{\circ}C$, no peak was observed. This provided crystalline properties indicating that the amorphous phase was observed up to $500^{\circ}C$. The electrical properties of a-0.5SZTO TFTs, such as the field effect mobility (${\mu}_{FE}$) of $24.31cm^2/Vs$, on current ($I_{ON}$) of $2.38{\times}10^{-4}A$, and subthreshold swing (S.S) of 0.59 V/decade improved with the thermal annealing treatment. This improvement was mainly due to the increased carrier concentration and decreased structural defects by rearranged atoms. However, when a-0.5SZTO TFTs were annealed at $700^{\circ}C$, a crystalline peak was observed. As a result, electrical properties degraded. ${\mu}_{FE}$ was $0.06cm^2/Vs$, $I_{ON}$ was $5.27{\times}10^{-7}A$, and S.S was 2.09 V/decade. This degradation of electrical properties was mainly due to increased interfacial and bulk trap densities of forming grain boundaries caused by the annealing treatment.

Design and control of extractive distillation for the separation of methyl acetate-methanol-water

  • Wang, Honghai;Ji, Pengyu;Cao, Huibin;Su, Weiyi;Li, Chunli
    • Korean Journal of Chemical Engineering
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    • 제35권12호
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    • pp.2336-2347
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    • 2018
  • The azeotrope of methyl acetate methanol and water was isolated using extractive distillation with water as entrainer. The pressure-swing extractive distillation (PSED) process and vapor side-stream distillation column (VSDC) with the rectifier process were designed to separate the methyl acetate, methanol and water mixture. It was revealed that the VSDC with the rectifier process had a reduction in energy consumption than the PSED process. Four control schemes of the two process were investigated: Double temperature control scheme (CS1), $Q_R/F$ feedforward control of reboiler duty scheme for PESD (CS2), $Q_R/F$ feedback control scheme for VSDC (CS3), the feedback control scheme of sensitive plate temperature of side-drawing distillation column to dominate the compressor shaft speed (CS4). Feed flow and composition disturbance were used to evaluate the dynamic performance. As a result, CS4 is a preferable choice for separation of methyl acetate-methanol-water mixture. A control scheme combining the operating parameters of dynamic equipment with the control indicators of static equipment was proposed in this paper. It means using the sensitive plate temperature of side-drawing column to control the compressor shaft speed. This is a new control scheme for extractive distillation.

Nano-CMOSFET를 위한 플라즈마-질화막의 초기 산화막 성장방법에 따른 소자 특성과 저주파 잡음 특성 분석 (Dependence of Low-frequency Noise and Device Characteristics on Initial Oxidation Method of Plasma-nitride Oxide for Nano-scale CMOSFET)

  • 주한수;한인식;구태규;유옥상;최원호;최명규;이가원;이희덕
    • 한국전기전자재료학회논문지
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    • 제20권1호
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    • pp.1-7
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    • 2007
  • In this paper, two kinds of initial oxidation methods i.e., SLTO(Slow Low Temperature Oxidation: $700^{\circ}C$) and RTO(Rapid Thermal Oxidation: $850^{\circ}C$) are applied prior to the plasma nitridation for ultra thin oxide of RPNO (Remote Plasma Nitrided Oxide). It is observed that SLTO has superior characteristics to RTO such as lower SS(Sub-threshold Slope) and improved Ion-Ioff characteristics. Low frequency noise characteristics of SLTO also showed better than RTO both in linear and saturation regime. It is shown that flicker noise is dominated by carrier number fluctuation in the channel region. Therefore, SLTO is promising for nano-scale CMOS technology with ultra thin gate oxide.

Effects of Ga Composition Ratio and Annealing Temperature on the Electrical Characteristics of Solution-processed IGZO Thin-film Transistors

  • Lee, Dong-Hee;Park, Sung-Min;Kim, Dae-Kuk;Lim, Yoo-Sung;Yi, Moonsuk
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권2호
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    • pp.163-168
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    • 2014
  • Bottom gate thin-film transistors were fabricated using solution processed IGZO channel layers with various gallium composition ratios that were annealed on a hot plate. Increasing the gallium ratio from 0.1 to 0.6 induced a threshold voltage shift in the electrical characteristics, whereas the molar ratio of In:Zn was fixed to 1:1. Among the devices, the IGZO-TFTs with gallium ratios of 0.4 and 0.5 exhibited suitable switching characteristics with low off-current and low SS values. The IGZO-TFTs prepared from IGZO films with a gallium ratio of 0.4 showed a mobility, on/off current ratio, threshold voltage, and subthreshold swing value of $0.1135cm^2/V{\cdot}s$, ${\sim}10^6$, 0.8 V, and 0.69 V/dec, respectively. IGZO-TFTs annealed at $300^{\circ}C$, $350^{\circ}C$, and $400^{\circ}C$ were also fabricated. Annealing at lower temperatures induced a positive shift in the threshold voltage and produced inferior electrical properties.

A 0.25-$\mu\textrm{m}$ CMOS 1.6Gbps/pin 4-Level Transceiver Using Stub Series Terminated Logic Interface for High Bandwidth

  • Kim, Jin-Hyun;Kim, Woo-Seop;Kim, Suki
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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    • pp.165-168
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    • 2002
  • As the demand for higher data-rate chip-to-chip communication such as memory-to-controller, processor-to-processor increases, low cost high-speed serial links\ulcorner become more attractive. This paper describes a 0.25-fm CMOS 1.6Gbps/pin 4-level transceiver using Stub Series Terminated Logic for high Bandwidth. For multi-gigabit/second application, the data rate is limited by Inter-Symbol Interference (ISI) caused by channel low pass effects, process-limited on-chip clock frequency, and serial link distance. The proposed transceiver uses multi-level signaling (4-level Pulse Amplitude Modulation) using push-pull type, double data rate and flash sampling. To reduce Process-Voltage-Temperature Variation and ISI including data dependency skew, the proposed high-speed calibration circuits with voltage swing controller, data linearity controller and slew rate controller maintains desirable output waveform and makes less sensitive output. In order to detect successfully the transmitted 1.6Gbps/pin 4-level data, the receiver is designed as simultaneous type with a kick - back noise-isolated reference voltage line structure and a 3-stage Gate-Isolated sense amplifier. The transceiver, which was fabricated using a 0.25 fm CMOS process, performs data rate of 1.6 ~ 2.0 Gbps/pin with a 400MHB internal clock, Stub Series Terminated Logic ever in 2.25 ~ 2.75V supply voltage. and occupied 500 * 6001m of area.

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The Electrical Characteristics of Low-Temperature Poly-Si Thin-Film Transistors by Different Crystallization Methods

  • 김문수;장경수;이준신
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.287.1-287.1
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    • 2014
  • 본 연구에서는 현재 디스플레이에서 가장 널리 이용되는 저온 polycrystalline silicon (poly-Si)의 결정화 방법에 따른 thin-film transistor (TFT)의 전기적 특성을 분석하였다. 분석에 이용된 결정화 방식은 Excimer Laser Annealing (ELA)와 Metal Induced Crystallization (MIC)이다. ELA와 MIC TFTs의 전기적 특성 측정을 통한 분석결과 ELA와 MIC poly-Si TFTs의 전기적 특성 [field-effect mobility (${\mu}_{FE}$), on/off current ratio ($I_{ON}/I_{OFF}$), sub-threshold swing (SS)]은 큰 차이는 없지만, ELA를 이용한 poly-Si TFT의 전기적 특성이 조금 우수하다. 하지만, MIC poly-Si TFT의 경우 threshold voltage ($V_{TH}$)가 0V에 보다 가까울 뿐만 아니라, 전기적 스트레스를 통한 신뢰성 확인 시 ELA poly-Si TFT보다 조금 더 안정적이다. 이는 ELA의 경우 좁은 면에 선형 레이저 빔으로 조사하면서 생기는 hill-lock의 영향으로 표면이 거칠고 균일하지 못하여 바이어스 인가시 생기는 문제이다. 또한 MIC는 금속 촉매를 이용해 결정립 경계를 확장하고 결정 크기를 키워 대면적화에 유리하다. Thermal Stress에서는 (from 293K to 373K) TFT에 점차 높은 온도를 가하자 MIC poly-Si TFT의 경우 off 상태에서 누설 전류 값이 증가하며 열에 민감한 반응을 보이는 것을 확인하였다.

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Nuclear Design Feasibility of the Soluble Boron Free PWR Core

  • Kim, Jong-Chae;Kim, Myung-Hyun;Lee, Un-Chul;Kim, Young-Jin
    • Nuclear Engineering and Technology
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    • 제30권4호
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    • pp.342-352
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    • 1998
  • A nuclear design feasibility of soluble boron free(SBF core for the medium-sized(600MWe) PWR was investigated. The result conformed that soluble boron free operation could be performed by using current PWR proven technologies. Westinghouse advanced reactor, AP-600 was chosen as a design prototype. Design modification was applied for the assembly design with burnable poison and control rod absorber material. In order to control excess reactivity, large amount of gadolinia integral burnable poison rods were used and B4C was used as a control rod absorber material. For control of bottom shift axial power shape due to high temperature feedback in SBF core, axial zoning of burnable poison was applied to the fuel assemblies design. The combination of enrichment and rod number zoning for burnable poison could make an excess reactivity swing flat within around 1% and these also led effective control on axial power offset and peak pin power, The safety assessment of the designed core was peformed by the calculation of MTC, FTC and shutdown margin. MTC in designed SBF core was greater around 6 times than one of Ulchin unit 3&4. Utilization of enriched BIO(up to 50w1o) in B4C shutdown control rods provided enough shutdown margin as well as subcriticality at cold refueling condition.

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