• Title/Summary/Keyword: Technology Mapping

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A spline finite element method on mapping

  • Ding, Hanshan;Shao, Rongguang;Ding, Dajun
    • Structural Engineering and Mechanics
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    • v.4 no.4
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    • pp.415-424
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    • 1996
  • This paper presents a newly suggested calculation method in which an arbitrary quadrilateral element with curved sides is transformed to a normal rectangular one by mapping of coordinates, then the two-dimensional spline is adopted to approach the displacement function of this element. Finally the solution can be obtained by the least-energy principle. Thereby, the application field of Spline Finite Element Method will be extended.

Design of a Time Optimaized Technology Mapping System (타이밍 최적화 기술 매핑 시스템의 설계)

  • 이상우;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.4
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    • pp.106-115
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    • 1994
  • This paper presents the design of a technology mapping system for optimizing delays of combinational and synchronous sequential logic circuits. The proposed system performs delay optimization for combinational logic circuits by remapping, buffering, and gate merging methods through the correct delay calculation in which the loading values are considered. To get time optimized synchronous sequential circuits, heuristic algorithms are proposed. The proposed algorithms reallocate registers by considering the critical path characteristics. Experimental results show that the proposed system produces a more optimized technology mapping for MCNC benchmarks compared with mis-II.

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Patch based Semi-supervised Linear Regression for Face Recognition

  • Ding, Yuhua;Liu, Fan;Rui, Ting;Tang, Zhenmin
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.8
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    • pp.3962-3980
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    • 2019
  • To deal with single sample face recognition, this paper presents a patch based semi-supervised linear regression (PSLR) algorithm, which draws facial variation information from unlabeled samples. Each facial image is divided into overlapped patches, and a regression model with mapping matrix will be constructed on each patch. Then, we adjust these matrices by mapping unlabeled patches to $[1,1,{\cdots},1]^T$. The solutions of all the mapping matrices are integrated into an overall objective function, which uses ${\ell}_{2,1}$-norm minimization constraints to improve discrimination ability of mapping matrices and reduce the impact of noise. After mapping matrices are computed, we adopt majority-voting strategy to classify the probe samples. To further learn the discrimination information between probe samples and obtain more robust mapping matrices, we also propose a multistage PSLR (MPSLR) algorithm, which iteratively updates the training dataset by adding those reliably labeled probe samples into it. The effectiveness of our approaches is evaluated using three public facial databases. Experimental results prove that our approaches are robust to illumination, expression and occlusion.

NON-CONVEX HYBRID ALGORITHMS FOR A FAMILY OF COUNTABLE QUASI-LIPSCHITZ MAPPINGS CORRESPONDING TO KHAN ITERATIVE PROCESS AND APPLICATIONS

  • NAZEER, WAQAS;MUNIR, MOBEEN;NIZAMI, ABDUL RAUF;KAUSAR, SAMINA;KANG, SHIN MIN
    • Journal of applied mathematics & informatics
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    • v.35 no.3_4
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    • pp.313-321
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    • 2017
  • In this note we establish a new non-convex hybrid iteration algorithm corresponding to Khan iterative process [4] and prove strong convergence theorems of common fixed points for a uniformly closed asymptotically family of countable quasi-Lipschitz mappings in Hilbert spaces. Moreover, the main results are applied to get the common fixed points of finite family of quasi-asymptotically nonexpansive mappings. The results presented in this article are interesting extensions of some current results.

CPLD Low Power Technology Mapping for Reuse Module Design under the Time Constraint (시간제약 조건하에서 재사용 모듈 설계를 통한 CPLD 저전력 기술 매핑)

  • Kang, Kyung Sik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.4 no.3
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    • pp.77-83
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    • 2008
  • In this paper, CPLD low power technology mapping for reuse module design under the time constraint is proposed. Traditional high-level synthesis do not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed algorithm is able to approach a productivity of the design the low power to reuse which given a library of user-defined datapath component and to share of resource sharing on the switching activity in a shared resource. Also, we are obtainable the optimal the scheduling result in experimental results of our using chaining and multi-cycling in the scheduling techniques. Low power circuit make using CPLD technology mapping algorithm for selection reuse module by scheduling.

A Study of Reuse Module Generation Algorithm consider the Power Consumption for FPGA Technology Mapping (FPGA 기술 매핑을 위한 소모 전력을 고려한 재사용 모듈 생성 알고리즘에 관한 연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.12
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    • pp.2306-2310
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    • 2007
  • In this paper, reuse module generation algorithm consider the power consumption for FPGA technology mapping is proposed. To proposed algorithm is RT library generating algorithm, consider power consumption for reuse module using FPGA technology mapping. In the first, selected FPGA for power consumption calculation. Technology mapping process have minimum total power consumption consider LUT's constraint in selected FPGA. A circuit into device by selected proper modules of allocation result for power consumption constraint using data.

Image Fusion and Evaluation by using Mapping Satellite-1 Data

  • Huang, He;Hu, Yafei;Feng, Yi;Zhang, Meng;Song, DongSeob
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.31 no.6_2
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    • pp.593-599
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    • 2013
  • China's Mapping Satellite-1, developed by the China Aerospace Science and Technology Corporation (CASC), was launched in three years ago. The data from Mapping Satellite-1 are able to use for efficient surveying and geometric mapping application field. In this paper, we fuse the panchromatic and multispectral images of Changchun area, which are obtained from the Mapping Satellite-1, the one that is the Chinese first transmission-type three-dimensional mapping satellite. The four traditional image fusion methods, which are HPF, Mod.IHS, Panshar and wavelet transform, were used to approach for effectively fusing Mapping Satellite-1 remote sensing data. Subsequently we assess the results with some commonly used methods, which are known a subjective qualitative evaluation and quantitative statistical analysis approach. Consequently, we found that the wavelet transform remote sensing image fusion is the optimal in the degree of distortion, the ability of performance of details and image information availability among four methods. To further understand the optimal methods to fuse Mapping Satellite-1 images, an additional study is necessary.

Scalable Application Mapping for SIMD Reconfigurable Architecture

  • Kim, Yongjoo;Lee, Jongeun;Lee, Jinyong;Paek, Yunheung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.6
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    • pp.634-646
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    • 2015
  • Coarse-Grained Reconfigurable Architecture (CGRA) is a very promising platform that provides fast turn-around-time as well as very high energy efficiency for multimedia applications. One of the problems with CGRAs, however, is application mapping, which currently does not scale well with geometrically increasing numbers of cores. To mitigate the scalability problem, this paper discusses how to use the SIMD (Single Instruction Multiple Data) paradigm for CGRAs. While the idea of SIMD is not new, SIMD can complicate the mapping problem by adding an additional dimension of iteration mapping to the already complex problem of operation and data mapping, which are all interdependent, and can thus significantly affect performance through memory bank conflicts. In this paper, based on a new architecture called SIMD reconfigurable architecture, which allows SIMD execution at multiple levels of granularity, we present how to minimize bank conflicts considering all three related sub-problems, for various RA organizations. We also present data tiling and evaluate a conflict-free scheduling algorithm as a way to eliminate bank conflicts for a certain class of mapping problem.

Rendering Performance Evaluation of 3D Games with Interior Mapping (Interior Mapping이 적용된 3D 게임의 렌더링 성능 평가)

  • Lee, Jae-Won;Kim, Youngsik
    • Journal of Korea Game Society
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    • v.19 no.6
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    • pp.49-60
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    • 2019
  • Interior Mapping has been used to reduce graphics resources. In this paper, rendering speed(FPS), the number of polygons, shader complexity and each resource size of Interior Mapping were compared to those of actual modeling in order to examine the performance of 3D games when the technology is adapted by utilizing Unreal Engine 4. In addition, for the efficient application, the difference in performance according to the resolution and detail of cube map texture was verified.

CONVERGENCE OF APPROXIMATING PATHS TO SOLUTIONS OF VARIATIONAL INEQUALITIES INVOLVING NON-LIPSCHITZIAN MAPPINGS

  • Jung, Jong-Soo;Sahu, Daya Ram
    • Journal of the Korean Mathematical Society
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    • v.45 no.2
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    • pp.377-392
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    • 2008
  • Let X be a real reflexive Banach space with a uniformly $G\hat{a}teaux$ differentiable norm, C a nonempty closed convex subset of X, T : C $\rightarrow$ X a continuous pseudocontractive mapping, and A : C $\rightarrow$ C a continuous strongly pseudocontractive mapping. We show the existence of a path ${x_t}$ satisfying $x_t=tAx_t+(1- t)Tx_t$, t $\in$ (0,1) and prove that ${x_t}$ converges strongly to a fixed point of T, which solves the variational inequality involving the mapping A. As an application, we give strong convergence of the path ${x_t}$ defined by $x_t=tAx_t+(1-t)(2I-T)x_t$ to a fixed point of firmly pseudocontractive mapping T.