• Title/Summary/Keyword: Ta-Ti

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Optimization of Ohmic Contact Metallization Process for AlGaN/GaN High Electron Mobility Transistor

  • Wang, Cong;Cho, Sung-Jin;Kim, Nam-Young
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.1
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    • pp.32-35
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    • 2013
  • In this paper, a manufacturing process was developed for fabricating high-quality AlGaN/GaN high electron mobility transistors (HEMTs) on silicon carbide (SiC) substrates. Various conditions and processing methods regarding the ohmic contact and pre-metal-deposition $BCl_3$ etching processes were evaluated in terms of the device performance. In order to obtain a good ohmic contact performance, we tested a Ti/Al/Ta/Au ohmic contact metallization scheme under different rapid thermal annealing (RTA) temperature and time. A $BCl_3$-based reactive-ion etching (RIE) method was performed before the ohmic metallization, since this approach was shown to produce a better ohmic contact compared to the as-fabricated HEMTs. A HEMT with a 0.5 ${\mu}m$ gate length was fabricated using this novel manufacturing process, which exhibits a maximum drain current density of 720 mA/mm and a peak transconductance of 235 mS/mm. The X-band output power density was 6.4 W/mm with a 53% power added efficiency (PAE).

Ferroelectric and Leakage current Properteis of SBT Capacitor with post-annealing Temperature (후속 열처리에 따른 SBT 캐패시터의 강유전 특성과 누설전류 특성)

  • 오용철;조춘남;김진사;신철기;박건호;최운식;김충혁;이준웅
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.668-671
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    • 2001
  • The Sr$\_$0.8/Si$\_$2.4/Ta$_2$O$\_$9/(SBT) thin films are deposited on Pt-coated electrode(Pt/TiO$_2$/SiO$_2$/Si) using RF magnetron sputtering method. With increasing post-annealing temperature from 600[$^{\circ}C$] to 850[$^{\circ}C$], Bi-layered perovskite phase was crystallized above 650[$^{\circ}C$]. The maximum remanent polarization and the coercive electric field is 11.60[${\mu}$C/$\textrm{cm}^2$], 48[kV/cm] respectively. The leakage current density of SBT capacitor at post-annealing temperature of 750[$^{\circ}C$] is 1.01${\times}$10$\^$-8/ A/$\textrm{cm}^2$ at 100[kV/cm]. The fatigue characteristics of SBT thin films did not change up to 10$\^$10/ switching cycles.

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Electric Properties of SBT Thin Films with various Annealing Conditions (다양한 열처리 조건에 따른 SBT 박막의 전기적 특성)

  • Cho, C.N.;Kim, J.S.;Oh, Y.C.;Shin, C.G.;Park, G.H.;Choi, W.S.;Kim, C.H.;Hong, J.U.;Lee, J.U.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.589-592
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    • 2002
  • The $Sr_{0.7}Bi_{2.3}Ta_2O_9$(SBT) thin films are deposited on Pt-coated electrode(Pt/TiO2/SiO2/Si) using RF magnetron sputtering method. The structural and electric properties of SBT capacitors were influenced with annealing atmosphere. In the XRD pattern, the SBT thin films in all annealing atmosphere had (105) orientation. In the SEM images, Bi-layered perovskite phase was crystallized in all annealing atmosphere and grains largely grew in oxygen annealing atmosphere. The maximum remanent polarization and the coercive electric field in oxygen annealing atmosphere are $12.40{\mu}C/cm^2$ and 48kV/cm respectively. The dielectric constant and leakage current density annealing in oxygen atmosphere are 340 and $6.81{\times}10^{-10}A/cm^2$ respectively. The fatigue characteristics of SBT capacitors did not change up to $10^{10}$ switching cycles.

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Fatigue Properties of SBT capacitor with annealing temperatures (열처리 온도에 따른 Pt/SBT/Pt 커패시터의 피로특성)

  • Cho, C.N.;Kim, J.S.;Oh, Y.C.;Shin, C.G.;Choi, W.S.;Kim, C.H.;Song, M.J.;Lee, J.U.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.09a
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    • pp.5-8
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    • 2001
  • The $Sr_{0.8}Bi_{2.4}Ta_{2}O_{9}(SBT)$ thin films are deposited on Pt-coated electrode$(Pt/TiO_{2}/SiO_{2}/Si)$ using RF magnetron sputtering method. With increasing annealing tempera ture from $600[^{\circ}C]$ to $850[^{\circ}C]$, Bi-layered perovskite phase was crystallized above $650[^{\circ}C]$. The dielectric constant is 213 at annealing temperature of $750[^{\circ}C]$ and dielectric loss have a stable value within 0.1. Leakage current density is $1.01{\times}10^{-8} A/cm^{2}$ at annealing temperature of $750[^{\circ}C]$ The fatigue characteristics of SBT thin films did not change up to $10^{10}$ switching cycles.

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Polarization properties of SBT capacitor with annealing temperatures (열처리에 따른 SBT 캐패시터의 분극특성)

  • Cho, C.N.;Kim, J.S.;Shin, C.G.;Chung, I.H.;Lee, S.G.;Lee, D.G.;Jung, D.H.;Kim, C.H.;Lee, J.U.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.09a
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    • pp.9-12
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    • 2001
  • The $Sr_{0.8}Bi_{2.4}Ta_2O_9(SBT)$ thin films are deposited on Pt-coated electrode($Pt/TiO_2/SiO_2/Si$) using RF magnetron sputtering method. With increasing post-annealing temperature from $600[^{\circ}C]$ to $850[^{\circ}C]$, Bi-layered perovskite phase was crystallized above $650[^{\circ}C]$. The maximum remanent polarization and the coercive electric field is 11.60[${\mu}C/cm^{2}$] 48[kV/cm] respectively. The leakage current density of SBT capacitor at post-annealing temperature of $750[^{\circ}C]$ is $1.01{\times}10^{-8}A/cm^2$ at 100[kV/cm]

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Fabrication and Characterization of the BLT/STA/Si Structure for Fe-FETs Application

  • Park, Kwang-Huna;Jeon, Ho-Seung;Park, Jun-Seo;Im, Jong-Hyun;Park, Byung-Eun;Kim, Chul-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.73-74
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    • 2006
  • Ferroelectric thin films have been widely investigated for future nonvolatile memory application. We fabricated the BLT ($(Bi,La)_4Ti_3O_{12}$) films on Si using a STA ($SrTa_2O_6$) buffer layer BLT and STA film were prepared by sol-gel method. Measurement data by XRD and AFM, showed that BLT film and STA films were well crystallized and a good surface morphology. From C-V measurement reward that the Au/BLT/STA/Si structure showed a clockwise hysteresis loop with a memory window of 1.5 V for the bias voltage sweep of ${\pm}5$ V. From results, the Au/BLT/STA/Si structure is useful for FeFETs.

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Fabrication of MFISFET Compatible with CMOS Process Using $SrBi_2Ta_2O_9$(SBT) Materials

  • You, In-Kyu;Lee, Won-Jae;Yang, Il-Suk;Yu, Byoung-Gon;Cho, Kyoung-Ik
    • Transactions on Electrical and Electronic Materials
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    • v.1 no.1
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    • pp.40-44
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    • 2000
  • Metal-ferroelectric-insulator-semoiconductor field effect transistor (MFISFETs) were fabricated using CMOS processes. The Pt/SBT/NO combined layers were etched for forming a conformal gate by using Ti/Cr metal masks and a two step etching method, By the method, we were able to fabricate a small-sized gate with the dimension of $16/4{\mu}textrm{m}$ in the width/length of gate. It has been chosen the non-self aligned source and drain implantation process, We have deposited inter-layer dielectrics(ILD) by low pressure chemical vapor deposition(LPCVD) at $380^{circ}C$ after etching the gate structure and the threshold voltage of p-channel MFISFETs were about 1.0 and -2.1V, respectively. It was also observed that the current difference between the $I_{ON}$(on current) and $I_{OFF}$(off current) that is very important in sensing margin, is more that 100 times in $I_{D}-V_{G}$ hysteresis curve.

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Dielectric Properties of SBT capacitor with annealing temperatures (열처리 온도에 따른 Pt/SBT/Pt 캐패시터의 유전특성)

  • Cho, C.N.;Oh, Y.C.;Jhung, I.H.;Kim, J.S.;Shin, C.G.;Choi, W.S.;Kim, C.H.;Lee, J.U.
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1546-1548
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    • 2001
  • The $Sr_{0.8}Bi_{2.4}Ta_2O_9$(SBT) thin films are deposited on Pt-coated electrode(Pt/$TiO_2$/ $SiO_2$/Si) using RF magnetron sputtering method. With increasing annealing temperature from 600[$^{\circ}C$] to 850[$^{\circ}C$], Bi-layered perovskite phase was crystallized above 650[$^{\circ}C$]. The dielectric constant is 213 at annealing temperature of 750[$^{\circ}C$] and dielectric loss have a stable value within 0.1. Leakage current density is $1.01{\times}10^{-8}A/cm^2$ at annealing temperature of 750[$^{\circ}C$].

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TMP station을 이용한 UBMS(Unbalanced magnetron sputtering) 시스템 개발

  • Gang, Chung-Hyeon;Ju, Jeong-Hun
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2017.05a
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    • pp.70-70
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    • 2017
  • TSV(through silicon via)는 긴 종횡비를 갖는 패턴에 Cu, Ta, Ti을 높은 conformality를 갖도록 증착하는 공정이다. Magnetron cathode의 자석 배열 설계는 target 물질 종류에 따라서 multitrack, water drop type등이 있으며 target과 substrate 사이의 공간에 플라즈마를 형성시켜서 기판에 이온 입사량을 늘린 후 기판 바이어스를 이용하여 이온 충돌, re-sputtering을 통한 재증착 과정을 통해 치밀한 금속 박막을 연속적으로 형성할 수 있도록 하는 것이 목적이다. 또한 sputter가 사용되고 있는 분야에 효율을 증대시키고, 증착되는 막의 품질향상을 위해 UBMS를 사용하고 있으며, 산업에 사용되어 지는 300 mm wafer용 시스템은 제작비가 약 10억 원 정도 소요되며 다양한 테스트를 진행하기 위해선 많은 비용이 소요된다. 따라서 비용과 소요시간을 줄여 다양한 테스트를 위해 소규모 플라즈마 시스템을 설계하게 되었다. 61 l/sec 터보 분자 펌프와 다이아프램 펌프를 기초로한 TMP station에 2.75 인치 CF flange가 장착된 6 way cross를 main 챔버로 활용하고, 작은 size의 unbalanced magnetron cathode를 제작, 장착한 다음 6 way cross 주변에 전자석을 적절히 배치하여 300 mm wafer system에서와 동일한 물리적 현상을 테스트 할 수 있도록 하였다. Fig1. (a) UBMS system의 사진을 나타내었고, (b)에는 6 way cross 내부에 발생된 플라즈마의 형상을 나타내었다. 전원 장치는 Advanced Energy사의 MDX-1.5K DC power supply를 사용하였고, 방전 전압 - 전류 관계의 가스 압력에 따른 plasma 현상과 magnetron 배율에 따른 plasma 현상 그리고 전자석에 의한 영향을 주로 관찰 하였다.

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Interfacial Layers for High Efficiency Polymer Solar Cells

  • Kim, Youn-Su;Choi, Ha-Na;Son, Seon-Kyoung;Kim, Ta-Hee;Kim, Bong-Soo;Kim, Kyung-Kon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.74-74
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    • 2011
  • Polymer solar cells utilize bulk heterojunction (BHJ) type photo-active layer in which the electron donating polymer and electron accepting C60 derivatives are mixed together. In the BHJ system the electron donating polymer and electron accepting C60 derivatives are blended. The blended system causes charge recombination at the interface between the BHJ active layer and electrode. To reduce the charge recombination at the interface, it is needed to use an interlayer that can selectively transfer electrons or holes. We have developed solution processable wide band gap inorganic interfacial layers for polymer solar cells. The effect of interlayers on the performance of polymer solar cell was investigated for various types of conjugated polymers. We have found that inorganic interfacial layers enhanced the solar cell efficiency through the reduction of charge recombination at the interface between active layer and electrode. Furthermore, the stability of the polymer solar cell using the interlayer was significantly improved. The efficiency of 6.5% was obtained from the PTB7:PCBM70 based solar cells utilizing $TiO_2$nanoparticles as an interlayers.

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