• 제목/요약/키워드: TFT (thin-film transistor)

검색결과 502건 처리시간 0.03초

Thin Film Transistor fabricated with CIS semiconductor nanoparticle

  • Kim, Bong-Jin;Kim, Hyung-Jun;Jung, Sung-Mok;Yoon, Tae-Sik;Kim, Yong-Sang;Choi, Young-Min;Ryu, Beyong-Hwan;Lee, Hyun-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1494-1495
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    • 2009
  • Thin Film Transistor(TFT) having CIS (CuInSe) semiconductor layer was fabricated and characterized. Heavily doped Si was used as a common gate electrode and PECVD Silicon nitride ($SiN_x$) was used as a gate dielectric material for the TFT. Source and drain electrodes were deposited on the $SiN_x$ layer and CIS layer was formed by a direct patterning method between source and drain electrodes. Nanoparticle of CIS material was used as the ink of the direct patterning method.

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채널에 단일 그레인 경계를 갖는 다결정 실리콘박막 트랜지스터 (An Excimer Laser Annealed Poly-Si Thin Film Transistor Designed for Reduction of Grainboundary Effect)

  • 전재홍
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제52권12호
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    • pp.559-561
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    • 2003
  • We report a new excimer laser annealing method which successfully results in a single grain boundary formation in the channel of polycrystalline silicon thin film transistor. The proposed method is based on lateral grain growth and employs aluminum patterns which act as selective beam mask and lateral heat sink. The maximum grain size obtained by the proposed method is about 1.6${\mu}{\textrm}{m}$ in the length. The grainboundaries should be arranged parallel with the direction of current flow for the best device performance, so we propose a new device fabrication method and a new poly-Si TFT structure. Poly-Si TFT fabricated by the proposed method exhibits considerably improved electrical characteristics, such as high field effect mobility exceeding 240 $cm^2$/Vsec.

비정질 실리콘 TFT의 광누설 전류에 Backlight 광원의 광학적 특성이 미치는 영향에 대한 연구 (A Study on the Effects of the Optical Characteristics of Backlight Sources on the Photo Leakage Currents of a-Si:H Thin Film Transistor)

  • 임승혁;권상직;조의식
    • 한국전기전자재료학회논문지
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    • 제21권9호
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    • pp.844-847
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    • 2008
  • The photo leakage currents of a conventional hydrogenated amorphous silicon(a-Si:H) thin film transistor(TFT) were investigated and analyzed in case of illumination from various light sources such as halogen lamp, cold cathode fluorescent lamp(CCFL) backlight, and white light emitting diode(LED) backlight. The photo leakage characteristics showed the apparent differences in the leakage level and in the $I_{on}/I_{off}$ ratio in spite of the similar luminances of light sources. This leakage level is expected to be related to the wavelength of the lowest intensity peak from the spectral characteristics of light sources.

Effect of Oxygen Binding Energy on the Stability of Indium-Gallium-Zinc-Oxide Thin-Film Transistors

  • Cheong, Woo-Seok;Park, Jonghyurk;Shin, Jae-Heon
    • ETRI Journal
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    • 제34권6호
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    • pp.966-969
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    • 2012
  • From a practical viewpoint, the topic of electrical stability in oxide thin-film transistors (TFTs) has attracted strong interest from researchers. Positive bias stress and constant current stress tests on indium-gallium-zinc-oxide (IGZO)-TFTs have revealed that an IGZO-TFT with a larger Ga portion has stronger stability, which is closely related with the strong binding of O atoms, as determined from an X-ray photoelectron spectroscopy analysis.

스텝 어닐링에 의한 저온 및 고온 n형 다결정 실리콘 박막 트랜지스터의 전기적 특성 분석 (Analysis of Electrical Characteristics of Low Temperature and High Temperature Poly Silicon TFTs(Thin Film Transistors) by Step Annealing)

  • 이진민
    • 한국전기전자재료학회논문지
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    • 제24권7호
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    • pp.525-531
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    • 2011
  • In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

LASER Crystallization System for Poly-Si

  • 이호년
    • 인포메이션 디스플레이
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    • 제7권2호
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    • pp.10-13
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    • 2006
  • Active Matrix Flat Panel Display(AM-FPD)의 경쟁력 향상을 위해서 반드시 필요한 고성능, 고생산성 Thin Film Transistor(TFT)를 제작에 사용하는 결정화 방법 중, 산업화에 가장 근접한 레이저 결정화 방법 및 장비에 대해서 기술한다.

Effects of 4MP Doping on the Performance and Environmental Stability of ALD Grown ZnO Thin Film Transistor

  • Kalode, Pranav Y.;Sung, M.M.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.471-471
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    • 2013
  • Highly stable and high performance amorphous oxide semiconductor thin film transistors (TFTs) were fabricated using 4-mercaptophenol (4MP) doped ZnO by atomic layer deposition (ALD). The 4 MP concentration in ZnO films were varied from 1.7% to 5.6% by controlling Zn: 4MP pulses. The carrier concentrations in ZnO thin films were controlled from $1.017{\times}10^{20}$/$cm^3$ to $2,903{\times}10^{14}$/$cm^3$ with appropriate amount of 4MP doping. The 4.8% 4MP doped ZnO TFT revealed good device mobility performance of $8.4cm^2V-1s-1$ and on/off current ratio of $10^6$. Such 4MP doped ZnO TFTs were stable under ambient conditions for 12 months without any apparent degradation in their electrical properties. Our result suggests that 4 MP doping can be useful technique to produce more reliable oxide semiconductor TFT.

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Improvement in the negative bias stability on the water vapor permeation barriers on Hf doped $SnO_x$ thin film transistors

  • 한동석;문대용;박재형;강유진;윤돈규;신소라;박종완
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2012년도 춘계학술발표대회
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    • pp.110.1-110.1
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    • 2012
  • Recently, advances in ZnO based oxide semiconductor materials have accelerated the development of thin-film transistors (TFTs), which are the building blocks for active matrix flat-panel displays including liquid crystal displays (LCD) and organic light-emitting diodes (OLED). However, the electrical performances of oxide semiconductors are significantly affected by interactions with the ambient atmosphere. Jeong et al. reported that the channel of the IGZO-TFT is very sensitive to water vapor adsorption. Thus, water vapor passivation layers are necessary for long-term current stability in the operation of the oxide-based TFTs. In the present work, $Al_2O_3$ and $TiO_2$ thin films were deposited on poly ether sulfon (PES) and $SnO_x$-based TFTs by electron cyclotron resonance atomic layer deposition (ECR-ALD). And enhancing the WVTR (water vapor transmission rate) characteristics, barrier layer structure was modified to $Al_2O_3/TiO_2$ layered structure. For example, $Al_2O_3$, $TiO_2$ single layer, $Al_2O_3/TiO_2$ double layer and $Al_2O_3/TiO_2/Al_2O_3/TiO_2$ multilayer were studied for enhancement of water vapor barrier properties. After thin film water vapor barrier deposited on PES substrate and $SnO_x$-based TFT, thin film permeation characteristics were three orders of magnitude smaller than that without water vapor barrier layer of PES substrate, stability of $SnO_x$-based TFT devices were significantly improved. Therefore, the results indicate that $Al_2O_3/TiO_2$ water vapor barrier layers are highly proper for use as a passivation layer in $SnO_x$-based TFT devices.

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TFT-LCD bus line용 AlNd 박막 특성에 관한 연구 (The characteristics of AlNd thin film for TFT-LCD bus line)

  • Dong-Sik Kim;Sung Kwan Kwak;Kwan Soo Chung
    • 한국진공학회지
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    • 제9권3호
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    • pp.237-241
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    • 2000
  • TFT-LCD(thin film transistor-liquid crystal display) 패널의 데이터 배선 재료로 사용하기 위하여 AlNd(2 wt%)의 Al합금 박막을 dc 마그네트론 스퍼터링 방법으로 유리 기판에 증착하여 열처리전과 열처리후의 구조적, 전기적, 식각 박막 특성을 조사하였다. 또한 증착한 박막을 식각하여 그 특성을 조사하였고, ITO를 증착하여 AlNd과의 접촉 저항을 Kelvin resistor를 사용하여 측정하였다. 증착된 박막을 $350^{\circ}C$에서 20분간 열처리 하였을때 AlW박막은 비저항이 감소하였고 약 $4\;{\mu\Omega}cm$의 아주 좋은 비저항 특성을 보였다. 주사전자 현미경(SEM)과 원자힘현미경(AFM)으로 표면을 분석한 결과 좋은 힐록방지 특성을 보임을 알 수 있었다. AlNd의 식각 특성은 아주 좋게 나타났고, ITO와 AlNd의 최저 접촉저항값은 약 $110\;{\mu\Omega}cm$이었다. 측정된 특성들을 바탕으로 AlNd(2 wt.%) 박막의 적용 가능성을 해상도와 화면 크기 측면에서 살펴보았을 때, 25인치 SXGA급 패널에 적용 가능함을 알 수 있었다.

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짧은 채널 길이의 다결정 실리콘 박막 트랜지스터의 전기적 스트레스에 대한 연구 (A study of electrical stress on short channel poly-Si thin film transistors)

  • 최권영;김용상;한민구
    • 전자공학회논문지A
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    • 제32A권8호
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    • pp.126-132
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    • 1995
  • The electrical stress of short channel polycrystalline silicon (poly-Si) thin film transistor (TFT) has been investigated. The device characteristics of short channel poly-Si TFT with 5$\mu$m channel length has been observed to be significantly degraded such as a large shift in threshold voltage and asymmetric phenomena after the electrical stress. The dominant degradation mechanism in long channel poly-Si TFT's with 10$\mu$m and 20$\mu$m channel length respectively is charage trappling in gate oxide while that in short channel device with 5.mu.m channel length is defect creation in active poly-Si layer. We propose that the increased defect density within depletion region near drain junction due to high electric field which could be evidenced by kink effect, constitutes the important reason for this significant degradation in short channel poly-Si TFT. The proposed model is verified by comparing the amounts of the defect creation and the charge trapping from the strechout voltage.

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