• 제목/요약/키워드: System semiconductor

검색결과 2,546건 처리시간 0.026초

Implementation of Neuromorphic System with Si-based Floating-body Synaptic Transistors

  • Park, Jungjin;Kim, Hyungjin;Kwon, Min-Woo;Hwang, Sungmin;Baek, Myung-Hyun;Lee, Jeong-Jun;Jang, Taejin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권2호
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    • pp.210-215
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    • 2017
  • We have developed the neuromorphic system that can work with the four-terminal Si-based synaptic devices and verified the operation of the system using simulation tool and printed-circuit-board (PCB). The symmetrical current mirrors connected to the n-channel and p-channel synaptic devices constitute the synaptic integration part to express the excitation and the inhibition mechanism of neurons, respectively. The number and the weight of the synaptic devices affect the amount of the current reproduced from the current mirror. The double-stage inverters controlling delay time and the NMOS with large threshold voltage ($V_T$) constitute the action-potential generation part. The generated action-potential is transmitted to next neuron and simultaneously returned to the back gate of the synaptic device for changing its weight based on spike-timing-dependent-plasticity (STDP).

Real-time Fault Detection in Semiconductor Manufacturing Process : Research with Jade Solution Company

  • Kim, Byung Joo
    • International Journal of Internet, Broadcasting and Communication
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    • 제9권2호
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    • pp.20-26
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    • 2017
  • Process control is crucial in many industries, especially in semiconductor manufacturing. In such large-volume multistage manufacturing systems, a product has to go through a very large number of processing steps with reentrant) before being completed. This manufacturing system has many machines of different types for processing a high mix of products. Each process step has specific quality standards and most of them have nonlinear dynamics due to physical and/or chemical reactions. Moreover, many of the processing steps suffer from drift or disturbance. To assure high stability and yield, on-line quality monitoring of the wafers is required. In this paper we develop a real-time fault detection system on semiconductor manufacturing process. Proposed system is superior to other incremental fault detection system and shows similar performance compared to batch way.

메모리 소자의 DC parameter 검사회로 설계 (The Circuit Design for the DC Parameter Inspection of Memory Devices)

  • 김준식;주효남;전병준;이상신
    • 반도체디스플레이기술학회지
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    • 제3권1호
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    • pp.1-7
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    • 2004
  • In this paper, we have developed the DC parameters test system which inspects the properties of DC parameters for semiconductor products. The developed system is interfaced by IBM-PC. It is consisted of CPLD part, ADC(Analog-to-Digital Converter), DAC(Digital-to-Analog Converter), voltage/current source, variable resistor and measurement part. In the proposed system, we have designed the constant voltage source and the constant current source in a part. In the comparison of results, the results of the simulation are very similar to the ones of the implementation.

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VHDL과 FPGA를 이용한 BLDC Motor의 속도 제어 시스템 구현 (Implementation of the BLDC Motor Speed Control System using VHDL and FPGA)

  • 박운호;양오
    • 반도체디스플레이기술학회지
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    • 제13권4호
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    • pp.71-76
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    • 2014
  • This paper presents the implementation for the BLDC motor speed control system using VHDL and FPGA. The BLDC motor is widely used in automation for its good robustness and easy controllability. In order to control the speed of the BLDC motor, the PI controller used for static RPM output of the BLDC motor to variations in load. In addition, by using the DA converter, we were able to monitor the BLDC motor reference speed and the current speed through real time. The motor speed command and the parameters of the PI speed controller were modified easily by the FPGA and the AD converter. Finally, in order to show the feasibility of the control algorithm the speed control characteristics of the motor was monitored using an oscilloscope and the DA converter. Further, the speed control system was designed in this paper has shown the applicability of the drive system of the factory automation.

새로운 반도체 Packaging용 Ethoxysilyl Bisphenol A Type Epoxy Resin System의 경화특성 연구 (Cure Characteristics of Ethoxysilyl Bisphenol A Type Epoxy Resin Systems for Next Generation Semiconductor Packaging Materials)

  • 김환건
    • 반도체디스플레이기술학회지
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    • 제16권2호
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    • pp.19-26
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    • 2017
  • The cure properties of ethoxysilyl bisphenol A type epoxy resin (Ethoxysilyl-DGEBA) systems with different hardeners were investigated, comparing with DGEBA and Diallyl-DGEBA epoxy resin systems. The cure kinetics of these systems were analyzed by differential scanning calorimetry with an isothermal approach, and the kinetic parameters of all systems were reported in generalized kinetic equations with diffusion effects. The Ethoxysilyl-DGEBA epoxy resin system showed lower cure conversion rates than DGEBA and Diallyl-DGEBA epoxy resin systems. The conversion rates of these epoxy resin systems with DDM hardener are lower than those with HF-1M hardener. It can be considered that the optimum hardener for Ethoxysilyl-DGEBA epoxy resin system is Phenol Novolac type. These lower cure conversion rates in the Ethoxysilyl-DGEBA epoxy resin systems could be explained by the retardation of reaction molecule movements according to the formation of organic-inorganic hybrid network structure by epoxy and ethoxysilyl group in Ethoxysilyl- DGEBA epoxy resin system.

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주문 생산형 반도체 장비를 위한 E-BOM 복제 방법의 구현 (Implementation of an E-BOM Copy Method for an Order-specific Semiconductor Equipment)

  • 박동석;양정삼;유기현;박범
    • 한국CDE학회논문집
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    • 제13권4호
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    • pp.273-285
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    • 2008
  • In this paper we propose an engineering bill of materials (E-BOM) copy method that can be utilized to manage the product information for each equipment during building a product lifecycle management (PLM) system in the order-specific semiconductor equipment manufacturer. The previous works studied on an E-BOM creation and management method for the mass manufacturing and production. The method is difficult to apply to an environment in which many engineering changes occur and the different specification to each equipment is required such as semiconductor equipments and facilities adopting built-to-order instead of built for inventory. Moreover the method is known to be the major drawback to deteriorate the design efficiency. Our E-BOM copy method enables users efficiently to manage the specification of a product and shortens the product development cycle. To implement the E-BOM copy method in the PLM environment, we developed the E-BOM copy system that automatically generates new parts and their numbers according to the numbering rule while copying the E-BOM from existing semiconductor equipments and then can apply the parts for reuse to new semiconductor equipments. This system can duplicate not only 3D CAD data but also technical documents.

Design of a Smart Gas Sensor System for Room Air-Cleaner of Automobile (Thick-Film Metal Oxide Semiconductor Gas Sensor)

  • Kim, Jung-Yoon;Shin, Tae-Zi;Yang, Myung-Kook
    • Journal of Electrical Engineering and Technology
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    • 제2권3호
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    • pp.408-412
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    • 2007
  • It is almost impossible to secure the reproductibility and stability of a commercial Thick-Film Metal Oxide Semiconductor Gas Sensor since it is very difficult to keep the consistency of the manufacturing environment. Thus it is widely known that the general Semiconductor-Oxide Gas Sensors are not appropriate for precise measurement systems. In this paper, the output characteristic analyzer of the various Thick-Film Metal Oxide Semiconductor Gas Sensors that are used to recognize the air quality within an automobile are proposed and examined. The analyzed output characters in a normal air chamber are grouped by sensor ranks and used to fill out the characteristic table of the Thick-Film Metal Oxide Semiconductor Gas Sensors. The characteristic table is used to determine the rank of the sensor that is equipped in the current air cleaner system of an automobile. The proposed air control system can also adapt the on-demand operation that recognizes the history of the passenger's manual-control.

가변 Threshold를 이용한 Wafer Align Mark 중점 검출 정밀도 향상 연구 (A Study on Improving the Accuracy of Wafer Align Mark Center Detection Using Variable Thresholds)

  • 김현규;이학준;박재현
    • 반도체디스플레이기술학회지
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    • 제22권4호
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    • pp.108-112
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    • 2023
  • Precision manufacturing technology is rapidly developing due to the extreme miniaturization of semiconductor processes to comply with Moore's Law. Accurate and precise alignment, which is one of the key elements of the semiconductor pre-process and post-process, is very important in the semiconductor process. The center detection of wafer align marks plays a key role in improving yield by reducing defects and research on accurate detection methods for this is necessary. Methods for accurate alignment using traditional image sensors can cause problems due to changes in image brightness and noise. To solve this problem, engineers must go directly into the line and perform maintenance work. This paper emphasizes that the development of AI technology can provide innovative solutions in the semiconductor process as high-resolution image and image processing technology also develops. This study proposes a new wafer center detection method through variable thresholding. And this study introduces a method for detecting the center that is less sensitive to the brightness of LEDs by utilizing a high-performance object detection model such as YOLOv8 without relying on existing algorithms. Through this, we aim to enable precise wafer focus detection using artificial intelligence.

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Accurate Extraction of Crosstalk Induced Dynamic Variation of Coupling Capacitance for Interconnect Lines of CMOSFETs

  • Kim, Yong-Goo;Ji, Hee-Hwan;Yoon, Hyung-Sun;Park, Sung-Hyung;Lee, Heui-Seung;Kang, Young-Seok;Kim, Dae-Byung;Kim, Dae-Mann;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권2호
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    • pp.88-93
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    • 2004
  • We, for the first time, present novel test patterns and conclusive on-chip data indicating that the variation of coupling capacitance, ${\Delta}C_C$ by crosstalk can be larger than static coupling capacitance, $C_C$. The test chip is fabricated using a generic 150 nm CMOS technology with 7 level metallization. It is also shown that ${\Delta}C_C$ is strongly dependent on the phase of aggressive lines. For antiphase crosstalk ${\Delta}C_C$ is always larger than $C_C$ while for in-phase crosstalk $D_{\Delta}C_C$is smaller than $C_C$.