Accurate Extraction of Crosstalk Induced Dynamic Variation of Coupling Capacitance for Interconnect Lines of CMOSFETs

  • Kim, Yong-Goo (Dept. of Electronics Engineering, Chungnam National University) ;
  • Ji, Hee-Hwan (Dept. of Electronics Engineering, Chungnam National University) ;
  • Yoon, Hyung-Sun (Dept. of Electronics Engineering, Chungnam National University) ;
  • Park, Sung-Hyung (System IC Technology & Product Development Center, Hynix Semiconductor) ;
  • Lee, Heui-Seung (System IC Technology & Product Development Center, Hynix Semiconductor) ;
  • Kang, Young-Seok (System IC Technology & Product Development Center, Hynix Semiconductor) ;
  • Kim, Dae-Byung (System IC Technology & Product Development Center, Hynix Semiconductor) ;
  • Kim, Dae-Mann (Computational Sciences, Korea Institute for Advanced Study) ;
  • Lee, Hi-Deok (Dept. of Electronics Engineering, Chungnam National University)
  • Published : 2004.06.30

Abstract

We, for the first time, present novel test patterns and conclusive on-chip data indicating that the variation of coupling capacitance, ${\Delta}C_C$ by crosstalk can be larger than static coupling capacitance, $C_C$. The test chip is fabricated using a generic 150 nm CMOS technology with 7 level metallization. It is also shown that ${\Delta}C_C$ is strongly dependent on the phase of aggressive lines. For antiphase crosstalk ${\Delta}C_C$ is always larger than $C_C$ while for in-phase crosstalk $D_{\Delta}C_C$is smaller than $C_C$.

Keywords

References

  1. S. Y. Oh, and K. J. Chang, IEEE Circuits and Devices magazine, pp. 16-21, Jan. 1995 https://doi.org/10.1109/101.340307
  2. D. H. Cho, Y. S. Eo, M. H. Seung, N. H. Kim, J. K. Wee, O. K. Kwon, and H. S. Park, IEDM Tech. Dig., pp. 619-622, 1996 https://doi.org/10.1109/IEDM.1996.554059
  3. H. D. Lee, M. J. Jang, D. G. Kang, Y. J. Lee, J. M. Hwang, and D. M. Kim, IEDM Tech. Dig., pp. 287-290, 1998 https://doi.org/10.1109/IEDM.1998.746356
  4. K. Yamashita, S. Odanaka, K. Egashira, and T. Ueda, IEDM Tech. Digest, pp. 631-634, 1999 https://doi.org/10.1109/IEDM.1999.824232
  5. H. D. Lee, M. J. Jang, D. G. Kang, J. M. Hwang, Y. J. Kim, O. K. Kwon, and D. M. Kim, IEDM Tech. Digest, pp. 905-908, 1999 https://doi.org/10.1109/IEDM.1999.824295
  6. J. F. Davis and J. D. Meindl, Symp. on VLSI Tech., pp. 165-166, 1999 https://doi.org/10.1109/VLSIT.1999.799395
  7. A. B. Kahng, S. Muddu, and E. Sarto, Design Automation Conference, pp. 79-84, 2000
  8. S. G. Lee, H. D. Lee, D. G. Kang, J. M. Hwang., JKPS, Vol. 35, pp. 870 -873, 1999
  9. J. H. Lee, M. J. Jang, K. S. Youn, Y. J. Park, H. G. Yoon, and H. D. Lee, JKPS, Vol. 40, No. 4, pp. 610-614, 2002 https://doi.org/10.3938/jkps.40.610
  10. M. J. Jang, J. H. Lee, Y. J. Park, H. K. Yoon and H. D. Lee, JKPS, Vol. 40, No. 4, pp. 619-623, 2002 https://doi.org/10.3938/jkps.40.619