• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 하계종합학술대회 논문집
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• pp.540-543
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• 1989

• 대한전자공학회논문지
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• 제25권1호
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• pp.94-100
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• 1988

To improve the switching time of active optical bistable devices, we propose an active optical bistable device that consists of a diode laser, a transistor, and a photodetector. By implementing the proposed device we realize the optical bistable device with a 5 nanosecond switching time. This is the fastest switching time among the hybrid type optical bistable devices. It is also experimentally demonstrated that the proposed device may be used in an optical disc pick up.

• 한국안전학회지
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• 제8권4호
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• pp.95-100
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• 1993

In power transistor switching circuit have shunt snubber(dv/dt limiting capacitor) and series snubber (di/dt limiting inductor). The shunt snubber is used to reduce the turn-off switching loss and the series snubber is used to reduce the turn-on switching loss. Design procedures are derived for selecting the capacitance, inductor and resistance to limit the peak voltage and current values. The action of snubber is analyzed and applied to the design for safety PWM inverter.

• Journal of Electrical Engineering and Technology
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• 제12권2호
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• pp.632-642
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• 2017

This paper presents an improved approach towards reducing the switching loss of insulated gate bipolar transistors (IGBTs) for a medium-capacity-class power conditioning system (PCS). In order to improve the switching performance, the switching operation is analyzed, and based on this analysis, an improved switching method that reduces the switching time and switching loss is proposed. Compared to a conventional gate drive scheme, the switching loss, switching time, and delay are improved in the proposed gate driving method. The performance of the proposed gate driving method is verified through several experiments.

• 융합신호처리학회논문지
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• 제9권2호
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• pp.129-134
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• 2008

본 논문에서는 적자생존 원리에 기반한 유전자 알고리즘을 이용하여 일차원 비선형 광자 결정 구조에 대해 분석하고, 광 트랜지스터로의 적용 가능성을 컴퓨터 시뮬레이션에 의해 증명한다. 이와 같은 형태의 최적 설계는 해석식이 필요한 steepest decent 최적 알고리즘과 달리 유전자 알고리즘은 탁월한 성능을 낼 수 있으며, 광 트랜지스터 뿐만 아니라 다른 광자 결정 광소자의 설계에 유용하게 적용될 수 있다. 또한, global minimum 최적해 부근에서 여러 가지의 해가 얻어지기 때문에 광 트랜지스터가 어떤 모양을 가져야 되는지 분석하는데 많은 도움을 주는 장점을 갖는다. 완전 광 필터 트랜지스터를 설계하기 위해 신경회로망 모델을 이용하여 초기 설계를 수행한 후, 유전자 알고리즘에 의해 최종적인 최적화 설계가 수행된다. 시뮬레이션으로부터 얻어진 일차원 광자 결정 트랜지스터의 스위칭 On/Off 비는 약 27dB 였다.

• 한국전기전자재료학회논문지
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• 제13권12호
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• pp.977-982
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• 2000

Conventional transistors which have vertical structure show increased parasitic capacitance characteristics in accordance with the increase of non-active base area and collector area. These consequently have disadvantage for high speed switching performance. In this paper, a lateral structure transistor which has minimized parasitic capacitance by using SDB(Silicon Direct Bonding) wafer and oxide sidewall isolation utilizing silicon trench technology is presented. Its structural characteristics are designed by ATHENA(SUPREM4), the process simulator from SILVACO International, and its performance is proven by ATLAS, the device simulator from SILVACO International. The performance of the proposed lateral structure transistor is certified through the V$\_$CE/-I$\_$C/ characteristics curve, h$\_$FE/-I$\_$C/ characteristics, and GP-plot. Cutoff Frequency is 13.7㎓.

• Bulletin of the Korean Chemical Society
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• 제35권3호
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• pp.731-736
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• 2014

An organic junction transistor with a vertical structure based on an active layer of poly(3-hexylthiophene) was fabricated by facile micro-contact printing combined with the Langmuir-Schaefer technique, without conventional e-beam or photo-lithography. Direct printing and subsequent annealing of Au-nanoparticles provided control over the thickness of the Au electrode and hence control of the electrical contact between the Au electrode and the active layer, ohmic or Schottky. The junction showed similar current-voltage characteristics to an NPN-type transistor. Current through the emitter was simply controllable by the base voltage and a high transconductance of ~0.2 mS was obtained. This novel fabrication method can be applied to amplifying or fast switching organic devices.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.759-762
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• 2000

Present transistors which have vertical structure show increased parasitic capacitance characteristics in accordance with the increase of non-active base area and collector area, consequently have disadvantage for high speed switching performance. In this paper, a horizontal structure transistor which has minimized parasitic capacitance in virtue of SDB(Silicon Direct Bonding) wafer and oxide sidewall isolation utilizing silicon trench technology is presented. Its structural characteristics were designed by ATHENA(SUPREM4), the process simulator from SILVACO International, and its performance was proven by ATLAS, the device simulator from SILVACO International. The performance of the proposed horizontal structure transistor was certified through the VCE-lC characteristics curve, $h_{FE}$ -IC characteristics, and GP-plot.

• Journal of Power Electronics
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• 제17권2호
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• pp.561-569
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• 2017

Power converter design requires simulation accuracy. In addition to the requirement of accurate models of power semiconductor devices, this paper highlights the role of considering a very good description of the converter circuit layout for an accurate simulation of its electrical behavior. This paper considers a simple experimental circuit including one switching cell where a MOSFET transistor controls the diode under test. The turn-off transients of the diode are captured, over which the circuit wiring has a major influence. This paper investigates the necessity for accurate modeling of the experimental test circuit wiring and the MOSFET transistor. It shows that a simple wiring inductance as the circuit wiring representation is insufficient. An adequate model and identification of the model parameters are then discussed. Results are validated through experimental and simulation results.

• 전기학회논문지
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• 제65권10호
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• pp.1664-1671
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• 2016

This paper presents the analysis of the gate-source voltage of the gallium nitride high electronic mobility transistor (GaN HEMT) in the half bridge structure focused on the mutual effects of two switching operation. Especially low side gate-source voltage is analyzed mathematically according to the high side switch turn-on and turn-off operation. Moreover, the influence of each gate resistance and parasitic component on the switching characteristic of other side switch is investigated, and the formula, simulation and experimental results are compared with theoretical data.