• KIPE Magazine
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• v.25 no.6
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• pp.32-36
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• 2020

• Journal of Power Electronics
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• v.11 no.2
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• pp.188-193
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• 2011

A highly efficient AC-DC converter for small wind power generation systems using a brushless DC generator (BLDCG) is presented in this paper. The market standard AC-DC converter for a BLDCG consists of a three-phase diode rectifier and a boost DC-DC converter, which has an IGBT and a fast recovery diode (FRD). This kind of two-stage solution basically suffers from a large amount of conduction loss and the efficiency greatly decreases under a light load, or at a low current, because of the switching devices with a P-N junction. In order to overcome this low efficiency, especially at a low current, a three-phase bridgcless converter consisting of three upper side FRDs and three lower side Super Junction FETs is presented. In the overall operating speed region, including the cut-in speed, the efficiency of the proposed converter is improved by up to 99%. Such a remarkable result is validated and compared with conventional solutions by calculating the power loss based on I-V curves and the switching loss data of the adopted commercial switches and the current waveforms obtained through PSIM simulations.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.7
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• pp.1363-1374
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• 2009

This paper reviews the characteristics and technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.109-114
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• 2013

Power MOSFET (metal-oxide semiconductor field-effect transistor) are widely used in power electronics applications, such as BLDC (Brushless Direct Current) motor and power module, etc. For the conventional power MOSFET device structure, there exists a tradeoff relationship between specific on-state resistance and breakdown voltage. In order to overcome the tradeoff relationship, a non-uniform super-junction (SJ) trench MOSFET (TMOSFET) structure for an optimal design is proposed in this paper. It is required that the specific on-resistance of non-uniform SJ TMOSFET is less than that of uniform SJ TMOSFET under the same breakdown voltage. The idea with a linearly graded doping profile is proposed to achieve a much better electric field distribution in the drift region. The structure modelling of a unit cell, the characteristic analyses for doping density, and potential distribution are simulated by using of the SILVACO TCAD 2D device simulator, Atlas. As a result, the non-uniform SJ TMOSFET shows the better performance than the uniform SJ TMOSFET in the specific on-resistance at the class of 100V.

• Journal of the Semiconductor & Display Technology
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• v.13 no.3
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• pp.45-50
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• 2014

In this paper, we propose a super-junction MOSFET (SJ MOSFET) fabricated through a simple pillar forming process by varying the Si epilayer thickness and doping concentration of pillars using SILVACO TCAD simulation. The design of the SJ MOSFET structure is presented, and the doping concentration of pillar, breakdown voltage ($V_{BR}$) and drain current are analyzed. The device performance of conventional Si planar metal-oxide semiconductor field-effect transistor(MOSFET), Si SJ MOSFET, and SiGe SJ MOSFET was investigated. The p- and n-pillars in Si SJ MOSFET suppressed the punch-through effect caused by drain bias. This lead to the higher $V_{BR}$ and reduced on resistance of Si SJ MOSFET. An increase in the thickness of Si epilayer and decrease in the former is most effective than the latter. The implementation of SiGe epilayer to SJ MOSFET resulted in the improvement of $V_{BR}$ as well as drain current in saturation region, when compared to Si SJ MOSFET. Such a superior device performance of SiGe SJ MOSFET could be associated with smaller bandgap of SiGe which facilitated the drift of carriers through lower built-in potential barrier.

• Journal of IKEEE
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• v.23 no.3
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• pp.832-838
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• 2019

In this paper, 4H-SiC MOSFET, the next generation power semiconductor device, was studied. In particular, Semi-SJ MOSFET structures with improved electrical characteristics than conventional DMOSFET structures were proposed in the class of 3300V, and static characteristics of conventional and proposed structures were compared and analyzed through TCAD simulations. Semi-SuperJunction MOSFET structure is partly structure that introduces SuperJunction, improves Electric field distribution through the two-dimensional depletion effect, and increases breakdown voltage. Benefit from the improvement of breakdown voltage, which can improve the on resistance as high doping is possible. The proposed structure has a slight reduction in breakdown voltage, but has an 80% decrease in on resistance compared to the conventional DMOSFET structure, and a 44% decrease in on resistance compared to the Current Spreading Layer(CSL) structure that improves the conventional DMOSFET structure.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.6
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• pp.371-374
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• 2015

This paper suggests a high performance lateral super barrier rectifier (Lateral SBR) device which has the advantages of both Schottky diode and pn junction, that is, low forward voltage and low leakage current, respectively. Advantage of the proposed lateral SBR is that it can be easily implemented and integrated in current BCD platform. As a result of simulation using TCAD, BVdss = 48 V, $V_F=0.38V$ @ $I_F=35mA$, T_j = $150^{\circ}C$ were obtained with very low leakage current characteristic of 3.25 uA.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.3
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• pp.148-151
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• 2017

This research concerns field rings for 3.3kV planar gate power insulated-gate bipolar transistors (IGBTs). We design an optimal field ring for a 3.3kV power IGBT and analyze its electrical characteristics according to field ring parameters. Based on this background, we obtained 3.3kV high breakdown voltage and a 2.9V on state voltage drop. To obtain high breakdown voltage, we confirmed that the field ring count was 23, and we obtained optimal parameters. The gap distance between field rings $13{\mu}m$ and the field ring width was $5{\mu}m$. This design technology will be adapted to field stop IGBTs and super junction IGBTs. The thyristor device for a power conversion switch will be replaced with a super high voltage power IGBT.

• Proceedings of the Korean Institute of Building Construction Conference
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• 2009.11a
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• pp.47-50
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• 2009

The existing techniques used to estimate and manage the compressive strength of concrete do not include the environmental factors that influence the development of compressive strength and the compressive strength itself. Thus, it is necessary to develop a reasonable yet simple way to measure the compressive strength of concrete structures at construction sites by considering concrete's mechanical properties and curing environment. This study was conducted to propose an acrylic form and a junction isolation mold with crack-inducing boards that uses non-destructive methods to create and collect concrete test samples that are cured in the same condition as the actual concrete structures. junction isolation molds were used in high-strength and super high-strength concrete to evaluate the reliability of compressive strength evaluation on the test sample. The following were the findings of this study:

• Korean Journal of Materials Research
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• v.20 no.11
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• pp.586-591
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• 2010

Solar cells have been more intensely studied as part of the effort to find alternatives to fossil fuels as power sources. The progression of the first two generations of solar cells has seen a sacrifice of higher efficiency for more economic use of materials. The use of a single junction makes both these types of cells lose power in two major ways: by the non-absorption of incident light of energy below the band gap; and by the dissipation by heat loss of light energy in excess of the band gap. Therefore, multi junction solar cells have been proposed as a solution to this problem. However, the $1^{st}$ and $2^{nd}$ generation solar cells have efficiency limits because a photon makes just one electron-hole pair. Fabrication of all-silicon tandem cells using an Si quantum dot superlattice structure (QD SLS) is one possible suggestion. In this study, an $SiO_x$ matrix system was investigated and analyzed for potential use as an all-silicon multi-junction solar cell. Si quantum dots with a super lattice structure (Si QD SLS) were prepared by alternating deposition of Si rich oxide (SRO; $SiO_x$ (x = 0.8, 1.12)) and $SiO_2$ layers using RF magnetron co-sputtering and subsequent annealing at temperatures between 800 and $1,100^{\circ}C$ under nitrogen ambient. Annealing temperatures and times affected the formation of Si QDs in the SRO film. Fourier transform infrared spectroscopy (FTIR) spectra and x-ray photoelectron spectroscopy (XPS) revealed that nanocrystalline Si QDs started to precipitate after annealing at $1,100^{\circ}C$ for one hour. Transmission electron microscopy (TEM) images clearly showed SRO/$SiO_2$ SLS and Si QDs formation in each 4, 6, and 8 nm SRO layer after annealing at $1,100^{\circ}C$ for two hours. The systematic investigation of precipitation behavior of Si QDs in $SiO_2$ matrices is presented.