• Title/Summary/Keyword: Sinusoidal output

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Electret-based microgenerators under sinusoidal excitations: an analytical modeling

  • Nguyen, Cuong C.;Ranasinghe, Damith C.;Al-Sarawi, Said F.
    • Smart Structures and Systems
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    • v.21 no.3
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    • pp.335-347
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    • 2018
  • The fast-growing number of mobile and wearable applications has driven several innovations in small-scale electret-based energy harvesting due to the compatibility with standard microfabrication processes and the ability to generate electrical energy from ambient vibrations. However, the current modeling methods used to design these small scale transducers or microgenerators are applicable only for constant-speed rotations and small sinusoidal translations, while in practice, large amplitude sinusoidal vibrations can happen. Therefore, in this paper, we formulate an analytical model for electret-based microgenerators under general sinusoidal excitations. The proposed model is validated using finite element modeling combined with numerical simulation approaches presented in the literature. The new model demonstrates a good agreement in estimating both the output voltage and power of the microgenerator. This new model provides useful insights into the microgenerator operating mechanism and design trade-offs, and therefore, can be utilized in the design and performance optimization of these small structures.

Generalized techniques of harmonics elimination in thyristor AC chopper (싸이리스터 AC chopper의 고주파제법에 관한 연구)

  • 한송엽;원상철
    • 전기의세계
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    • v.24 no.6
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    • pp.92-96
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    • 1975
  • A generalized theroretical method is developed to eliminate a given number of harmonics in AC chopper output waves. The results show that halfwave symmetric and sinusoidal symmetric chopping are required to eliminate all even numbers of harmonics and , at least, M+1 times per half cycle chopping is required to eliminate any M odd number of harmonics in the given effective value of the output wave.

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DSP Control of Three-Phase UPS Inverter with Output Voltage Harmonic Compensator (3상 UPS 인버터의 출력전압 왜형률 개선을 위한 고조파 보상기법의 DSP 제어)

  • 변영복;조기연;박성준;김철우
    • Proceedings of the KIPE Conference
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    • 1997.07a
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    • pp.269-275
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    • 1997
  • This paper presents real time digital signal processor(DSP) control of UPS system feeding processor(DSP) control of UPS system feeding nonlinear loads to provide sinusoidal inverter output voltage. The control scheme is composed of an rms voltage compensator, the load current harmonics feed-forward loop for the cancellation of output voltage harmonics, and the output voltage harmonics feedback loop for system stability. The controller employs a Texas Instruments TMS320C40GFL50 DSP.

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A Study on the Step-up PWM Cycloconverter (승압형 PWM 싸이크로 콘버터에 관한 연구)

  • 박민호;홍순찬;김기택
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.38 no.6
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    • pp.431-440
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    • 1989
  • This paper proposes a new PWM cycloconverter which can step up input voltage. With input reactors ac power supply acts as current source, and with output capacitors the balanced output voltage is build-up. The converter is modeled with fourth order state equation using dq transformation and the steady state characteristics are evaluated. It is shown that the proposed converter can generate the output voltage 2-5 times greater than input voltage. The output voltage and input current have sinusoidal and smooth waveforms and the converter is capable of voltage build-up. The characteristics of the proposed converter is verified simulation and experiment.

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Design of digital clock level translator with 50% duty ratio from small sinusoidal input (작은 정현파입력의 50% Duty Ratio 디지털 클럭레벨 변환기 설계)

  • Park, Mun-Yang;Lee, Jong-Ryul;Kim, Ook;Song, Won-Chul;Kim, Kyung-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.8
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    • pp.2064-2071
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    • 1998
  • A new digital clock level translator has been designed in order to produce a clock source of the internal logic circuits. The translator output has 50% duty ratio from small sinusoidal input such as TCXO which oscillates itself in poratable components. The circuit consists of positive and negative comparators, RS latch, charge pump, and reference vol- tage generator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator reference, producing output waveform with valid 50% duty ratio of the digital signal level. The designed level translator can be used as a sampling clock source of ADC, PLL and the colck source of the clock synthesizer. The circuit wasdesigned in a 0.8.mu.m analog CMOS technology with double metal, double poly, and BSIM3 circuit simulation model. From our experimental results, a stable operating characteristics of 50 +3% duty ratio was obtained from the sinusoidal input wave of 370 mV.

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A Single-Input Single-Output Approach by using Minor-Loop Voltage Feedback Compensation with Modified SPWM Technique for Three-Phase AC-DC Buck Converter

  • Alias, Azrita;Rahim, Nasrudin Abd.;Hussain, Mohamed Azlan
    • Journal of Power Electronics
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    • v.13 no.5
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    • pp.829-840
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    • 2013
  • The modified sinusoidal pulse-width modulation (SPWM) is one of the PWM techniques used in three-phase AC-DC buck converters. The modified SPWM works without the current sensor (the converter is current sensorless), improves production of sinusoidal AC current, enables obtainment of near-unity power factor, and controls output voltage through modulation gain (ranging from 0 to 1). The main problem of the modified SPWM is the huge starting current and voltage (during transient) that results from a large step change from the reference voltage. When the load changes, the output voltage significantly drops (through switching losses and non-ideal converter elements). The single-input single-output (SISO) approach with minor-loop voltage feedback controller presented here overcomes this problem. This approach is created on a theoretical linear model and verified by discrete-model simulation on MATLAB/Simulink. The capability and effectiveness of the SISO approach in compensating start-up current/voltage and in achieving zero steady-state error were tested for transient cases with step-changed load and step-changed reference voltage for linear and non-linear loads. Tests were done to analyze the transient performance against various controller gains. An experiment prototype was also developed for verification.

A Study on the PWN Inverter for the Design of UPS (무정전 전원(UPS)설계를 위한 PWN 인버터에 관한 연구)

  • 이성백;구용회;이종규
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.2 no.2
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    • pp.59-63
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    • 1988
  • In a fixed AC power source the PWM techniques were used to vary the voltage and the fundamental frequency. The conventional PWM techniques due to the problem of commutation number and filter size have been studied the PWM output waveforms which applied the motor drive. However in this paper, the carrier frequency with sinusoidal PWM waveform is modulated from 10(KHz) to 45(KHz) using termination devices with high - speed switching capacity and applying LPF(Low Pass Filter) with small capacity to output of inverter and the PAM(Pulse Amplitude Modulation)is obtained. Considering the property of the speed and the control, the sinusoidal PWM control circuit was composed of the microprocessor and analog circuit. In experment result, the system properties are study on the sinusoidal voltage waveform with modulation index changing from 0.6 to 1.0.

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Multilevel Inverter to Reduce Common Mode Voltage in AC Motor Drives Using SPWM Technique

  • Renge, Mohan M.;Suryawanshi, Hiralal M.
    • Journal of Power Electronics
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    • v.11 no.1
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    • pp.21-27
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    • 2011
  • In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverters using a phase opposition disposed (POD) sinusoidal pulse width modulation (SPWM) technique is proposed. The SPWM technique does not require computations therefore, this technique is easy to implement on-line in digital controllers. A good tradeoff between the quality of the output voltage and the magnitude of the CMV is achieved in this paper. This paper realizes the implementation of a POD-SPWM technique to reduce CMV using a five-level diode clamped inverter for a three phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.

Fourier Analysis of Output Waveform of a Series Inverter (직렬인버어타 출력파형의 조화분석)

  • 이영근;김종훈
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.6 no.4
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    • pp.1-7
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    • 1969
  • A Series Inverter circuit is analyzed and Fourier analysis is applied to its output waveform. It is proved that under the optimum condition the Output is nearly sinusoidal wave which contains only odd harmonic Components and the relative amplitude of the hramonic components are expressed with very simple formula which contain only "Q" of the circuit as a parameter.parameter.

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Design of Output Regulator for Rejecting Periodic Eccentricity Disturbance in Optical Disc Drive

  • Shim, Hyung-Bo;Kim, Hyung-Jong;Chung, Chung-Choo
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.452-457
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    • 2003
  • An add-on type output regulator is proposed in this paper. By an add-on controller we mean an additional controller which operates harmonically with a pre-designed one. The role of the add-on controller is to reject a sinusoidal disturbance of unknown magnitude and phase but with known frequency. Advantages of the proposed controller include that (1) it can be used only when the performance of disturbance rejection needs to be enhanced, (2) when it is turned on or off, unwanted transient can be avoided (i.e., bumpless transfer), (3) it is designed for perfect disturbance rejection not just for disturbance reduction, (4) ability for perfect rejection is preserved even with uncertain plant model. This design may be promising for optical disc drive (ODD) systems in which disc eccentricity results in a sinusoidal disturbance. For ODD systems, the sensitivity function obtained by the pre-designed controller, which may have been designed by the lead-lag, $H_{\infty}$, or DOB (disturbance observer) technique, does not change much with the add-on controller except at the frequency of the disturbance. Since the add-on controller does the job of rejecting major eccentricity disturbance, the gain of the pre-designed controller does not have to be too high.

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