• 전기학회논문지
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• 제64권2호
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• pp.268-275
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• 2015

This paper proposes a method of switching to improve power loss for the single-phase three-level NPC inverter. The conventional switching methods, which are called as the bipolar and unipolar switching methods, are used for single phase inverters using three-level topology. However, these switching method have disadvantage in the power loss. Because all of the switch are operated. To reduce the power loss of the three-level NPC inverter, clamp switching method is introduced in this paper. This way, one of the lag is fixed that switching loss is reduced. This paper analyzes and compares power losses of unipolar method and clamp method. The validity of the power loss analysis is verified through the simulation and experimental results.

• Journal of Power Electronics
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• 제13권6호
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• pp.1016-1023
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• 2013

Predictive current control offers the potential for achieving more precise current control with a minimum of distortion and harmonic noise. However, the predictive method is difficult to implement and has a greater computational burden. This paper introduces a theoretical analysis and experimental verification for an improved predictive current control technique applied to single phase grid connected voltage source inverters (VSI). The proposed technique has simple calculations. An ATmega1280 microcontroller board is used to implement the proposed technique for a simpler and cheaper control system. To enhance the current performance and to obtain a minimum of current THD, an improved tri-level PWM switching strategy is proposed. The proposed switching strategy uses six operation modes instead of four as in the traditional strategy. Simulation results are presented to demonstrate the system performance with the improved switching strategy and its effect on current performance. The presented experimental results verify that the proposed technique can be implemented using fixed point 8-bit microcontroller to obtain excellent results.

• Journal of Power Electronics
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• 제15권5호
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• pp.1217-1226
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• 2015

In a grid-connected photovoltaic (PV) system, the traditional Z-source inverter uses a low frequency transformer to ensure galvanic isolation between the grid and the PV system. In order to combine the advantages of both Z-source inverters and transformerless PV inverters, this paper presents a modified single-phase transformerless Z-source PV grid-connected inverter and a corresponding PWM strategy to eliminate the ground leakage current. By utilizing two reversed-biased diodes, the path for the leakage current is blocked during the shoot-through state. Meanwhile, by turning off an additional switch, the PV array is decoupled from the grid during the freewheeling state. In this paper, the operation principle, PWM strategy and common-mode (CM) characteristic of the modified transformerless Z-source inverter are illustrated. Furthermore, the influence of the junction capacitances of the power switches is analyzed in detail. The total losses of the main electrical components are evaluated and compared. Finally, a theoretical analysis is presented and corroborated by experimental results from a 1-kW laboratory prototype.

• Journal of Power Electronics
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• 제16권5호
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• pp.1821-1832
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• 2016

This study presents a strategy using the synchronized output regulation method (SOR) for controlling inverters operating in stand-alone and grid-connected modes. From the view point of networked dynamic systems, SOR involves nodes with outputs that are synchronized but also display a desirable wave shape. Under the SOR strategy, the inverter and grid are treated as two nodes that comprise a simple network. These two nodes work independently under the stand-alone mode. An intermediate mode, here is named the synchronization mode, is emphasized because the transition from the stand-alone mode to the grid-connected mode can be dealt as a standard SOR problem. In the grid-connected mode, the inverter operates in an independent way, in which the voltage reference changes for generalized synchronization where its output current satisfies the required power injection. Such a relatively independent design leads to a seamless transfer between operation modes. The closed-loop system is analyzed in the state space on the basis of the output regulation theory, which improves the robustness of the design. Simulations and experiments are performed to verify the proposed control strategy.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• 전력전자학회논문지
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• 제16권4호
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• pp.309-316
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• 2011

태양광 발전시스템 등에서 전력을 공급하기 위한 계통연계 인버터에서 계통전압의 동기화를 위하여 PLL시스템이 많이 사용되어 왔다. 본 논문은 단상 및 3상 계통연계 인버터의 동기화 성능을 향상시키기 위하여 루프필터 및 PI 제어기가 없는 PLL 알고리즘을 제시한다. 단상 또는 3상 계통전압으로 유도한 2상 전압을 사용하여 위상 검출기 출력이 직류성분만 있으면서 동기화되었을 때 0이 되도록 궤환신호를 결정한다. 소신호 해석방법으로 비례제어기를 사용한 PLL시스템을 모델링하여 안정도 및 정상상태 오차를 관찰한다. 시뮬레이션 및 실험결과를 통하여 제시한 PLL알고리즘의 타당성을 확인한다.

• 전력전자학회논문지
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• 제19권6호
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• pp.511-521
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• 2014

This study proposes an electric vehicle (EV) smart panel board and its control method on the basis of charging scheduling. The proposed system consists of batteries, a three-phase battery charger, three single-phase inverters, transfer switches for electric power distribution, and a controller. The three-phase battery charger usually charges the batteries at midnight when electric rates are cheap and in light load. When the electric power consumption of the EV standard chargers connected to one phase of the power line is relatively large or when a blackout occurs, the electric power stored in the battery is supplied by discharging through the inverters to the EV standard chargers. As a result, the value of peak load and the charging electric power quantity supplied from a utility grid are reduced, and the current unbalance is improved. The usefulness of the proposed system is confirmed through simulations, experiments, and case studies.

• Journal of Power Electronics
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• 제12권4호
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• pp.548-558
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• 2012

In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

• 조명전기설비학회논문지
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• 제27권12호
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• pp.133-140
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• 2013

Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.

• 조명전기설비학회논문지
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• 제25권8호
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• pp.8-19
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• 2011

This paper was compared for the output voltage and efficiency of the single-phase Z-source inverter(ZSI) according to shoot through duty ratio D. The eight single-phase ZSI in this study are typical ZSI, Embedded ZSI(EZSI), Improved ZSI(IZSI), Quasi ZSI(QZSI), Series ZSI, Trans ZSI(TSI), Switched inductor ZSI(SL-ZSI) and Extended boost ZSI (exZSI). The eight ZSI are divided into two Groups. ; Group-1 which is ZSI with the ordinary voltage boost factor B, and Group-2 which is ZSI with the maximum voltage boost factor B. For the execution of the proposed study, the PSIM simulation was achieved under the condition of input DC voltage=150[V] of ZSI, load =30[${\Omega}$] and 60[Hz] output filter. The output voltage and efficiency of each ZSI were calculated within the limits of D=0.1~0.4. As a result, the output peak voltage of Group-2 was suddenly increased in a specified duty ratio D, and its efficiency was rapidly decreased. On the contrary, Group-1 shown the output and efficiency characteristics without sudden change compared to Group-2 despite the duty ratio increase. The efficiency of the Group-2 was sharply declined at duty ratio D of the most output voltage, but, in case of Group-1, the efficiency was slightly declined. Finally, the input DC current of ZSI with DCM and CCM was discussed.