A Modified Single-Phase Transformerless Z-Source Photovoltaic Grid-Connected Inverter

Abstract

In a grid-connected photovoltaic (PV) system, the traditional Z-source inverter uses a low frequency transformer to ensure galvanic isolation between the grid and the PV system. In order to combine the advantages of both Z-source inverters and transformerless PV inverters, this paper presents a modified single-phase transformerless Z-source PV grid-connected inverter and a corresponding PWM strategy to eliminate the ground leakage current. By utilizing two reversed-biased diodes, the path for the leakage current is blocked during the shoot-through state. Meanwhile, by turning off an additional switch, the PV array is decoupled from the grid during the freewheeling state. In this paper, the operation principle, PWM strategy and common-mode (CM) characteristic of the modified transformerless Z-source inverter are illustrated. Furthermore, the influence of the junction capacitances of the power switches is analyzed in detail. The total losses of the main electrical components are evaluated and compared. Finally, a theoretical analysis is presented and corroborated by experimental results from a 1-kW laboratory prototype.

I. INTRODUCTION

For PV grid-connected systems, two types of inverters are usually used. One is a dc/ac inverter with a line-frequency transformer and the other is a dc/ac inverter with a dc/dc converter. This line-frequency transformer can boost the voltage after the dc/ac inverter and guarantee galvanic isolation between the grid and the PV system [1]. However, because of its low frequency (50–60Hz), this transformer is big, heavy and expensive [2]. Therefore, a high frequency dc-dc converter with a high-frequency transformer is used to boost the voltage to reach a constant value [3], [4]. Unfortunately, the high-frequency transformer and switches in the dc/dc converter will cause additional power loss. As a result, the interest in single-stage transformerless conversion topologies has grown.

In single-stage topologies, the Z-source inverter is one of the best choices to realize inversion and boost functions in a single stage [5]-[7]. It has some advantages such as a simple structure, high reliability of the inverter to avoid the influence of shoot-through due to EMI, and little output waveform distortion. However, the isolation capability has to be considered carefully because of the removal of the transformer. The traditional Z-source inverter topology with its PWM techniques can generate a high-frequency three-level CM voltage, whose peak value is equal to the Z-source capacitor voltage stress. Because of the capacitance between the PV panel and the ground, the high-frequency potential difference can cause undesirable leakage currents in transformerless PV systems [8]. The additional leakage currents can increase the grid current ripples, system losses, and (conducted and radiated) electromagnetic interferences [9]-[11]. Thus, a novel transformerless Z-source inverter topology and a particular PWM strategy should be researched to reduce leakage current in order to meet the strict grid codes established by authorities. For example, a 300mA threshold level is stated in the DIN VDE 0216 standard [12].

Recently many research works have been proposed to eliminate the leakage current to meet this standard. These leakage current reduction techniques can be mainly divided into two groups. One is a group of galvanic isolation techniques, and the other is a group of CM voltage clamping techniques.

The galvanic isolation topologies introduce dc-decoupling and ac-decoupling methods to disconnect PV systems and the grid during zero states [13]. H5 and H6 belong to the dc-decoupling topology family. The H5 topology, which is used in SMA (SMA Solar Technology AG) commercial converters, adds only one switch when compared to full-bridge (FB) inverters [14]. The H6 topology, which is proposed in [15], symmetrically adds two additional switches to the FB inverter. The H6 topology equally distributes the device’s efforts and balances the thermal distribution. In [16], a novel H6 topology is proposed, which constructs a new direct power passing path in a half cycle to reduce the conduction loss. The highly efficient reliable inverter concept (HERIC) topology applies a bidirectional switch to realize the disconnection of the converter and the grid during zero-voltage vectors [17]. Due to the reduction of switches, the ac-decoupling method can provide lower power losses in the conduction path. Although the topologies mentioned above have a simple circuit structure, the galvanic isolation cannot completely eliminate the leakage current due to the influence of switches’ junction capacitances and the parasitic parameters of the leakage current loop [15].

To completely eliminate the leakage current, the CM voltage should be clamped to half of the input voltage during the zero state, which can keep the CM voltage constant for all of the switching modes. This clamping technique has been used in the oH5 [18], modified H6 topologies [19], HB-ZVR [20] and HBZVR-D [21]. By connecting one pole of a PV cell directly to the neutral line of the grid, the leakage current can be eliminated. In [22], the negative pole of a PV array is directly connected to the neutral line of grid. In [23], the positive terminal of a PV array is connected to the phase output during the positive half-wave and to the neutral terminal during the negative half-wave. In addition, the neutral point clamp (NPC) inverter [24] connects the midpoint of a PV array to the neutral of a grid, which achieves three or more output levels. However, the NPC inverter, like the half-bridge inverter, demands a higher input voltage.

In this paper, a modified single-phase transformerless Z-source inverter (ZSI-TL) with one decoupling switch and two fast-recovery diodes is presented to eliminate the ground leakage current. In addition, a special PWM strategy is proposed to avoid zero states with the two lower switches conduction. Furthermore, it can ensure that each phase leg switches on and off once per switching cycle, and it can make the shoot-through zero states evenly allocated into each phase. Moreover, it is analyzed that the junction capacitances of the switches can influence the CV voltage, and a corresponding paralleled capacitor of the switch is designed. Hence, the path for the leakage current can be blocked by two reverse-biased diodes during the shoot-through state, while the CM voltage remains constant during the non-shoot-through state. Therefore, the leakage current is eliminated.

The paper is organized as follows. Section II introduces the ZSI-TL, its PWM strategy and the corresponding operation mode. Section III illustrates the leakage current reduction principle, while Section IV analyzes the system losses. Section V shows some experimental results, and Section VI draws some conclusions.

 

II. OPERATION PRINCIPLES OF THE MODIFIED TOPOLOGY

A. Structure of the Modified ZSI-TL

Fig. 1 shows the ZSI-TL by using the dc-decoupling method. When compared with the traditional single-phase Z-source grid-connected inverter, the ZSI-TL adds one additional switch (S5) and one fast-recovery diode (D2). S5 is used to electrically decouple the PV array from the grid during the zero state, while D1 and D2 are used to block the path of the leakage current during the shoot-through state.

Fig. 1.Single-phase transformerless Z-source grid-connected PV inverter.

B. Modified PWM Strategy

The PWM strategy is one of the key factors that affects the leakage current. To achieve the aim of eliminating the leakage current of the ZSI-TL, the modulation strategy of the traditional single-phase Z-source inverter needs to be modified. For Z-source inverter modulation, the shoot-through states are added to the null intervals to keep the active interval constant. In order to ensure that only one single device is switched during every state transition, the shoot-through states are added adjacent to the instants of the state transitions of a conventional voltage-source inverter. According to the ZSI-TL topology structure, the zero states where S2 or S4 conducts must be forbidden to eliminate the leakage current in the modified PWM strategy. Therefore, to achieve the aim of boosting the dc-link voltage, the shoot-through states should be added between the active sates and the zero states where S1 or S3 conducts.

As an illustration, Fig. 2 shows the switching patterns of the ZSI-TL. Here, S1 is ON and S2 is OFF during the positive half cycle. Sinusoidal reference signals are used to modulate S3. S4 and S5, with additional shoot-through time intervals added, commutate complementarily to S3. Similarly, during the negative half cycle, S3 is ON and S4 is OFF. S1 commutates at the switching frequency. S2 and S5, with additional shoot-through time intervals added, commutate complementarily to S1. It should be noted that each phase leg continues to switch on and off once per switching cycle. Without changing the total zero-state time interval, the shoot-through zero states are evenly allocated into each phase.

Fig. 2.Modulation strategy of ZSI-TL. (a) During the positive half cycle. (b) During the negative half cycle.

Assuming that the inductors LZ1 and LZ2 have the same inductance (L) and that the capacitors CZ1 and CZ2 have the same capacitance (C), the Z-source network becomes symmetrical. As a result, the following formula can be obtained as:

According to the modified PWM strategy, the shoot-through duty ratio d0 should be limited to 1-M.

Therefore, the output peak voltage of the inverter can be expressed as:

where the peak dc-link voltage, VPV is the output voltage of the PV panel, M is the modulation index, and T0, T1 and TS are the shoot-through time interval, the non-shoot-through time interval and the switching cycle, respectively. Equation (2) shows that the output voltage can be stepped up or down by choosing an appropriate boost factor, G,

If M=1-d0, the relation between M and the maximum value for G can be obtained as:

Thus, to boost the output voltage, M ranges from 0.5 to 1.

C. Operation Mode Analysis

Fig. 3 shows the operation modes of the ZVI-TL.

Fig. 3.Six operation modes of ZVI-TL. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5. (f) Mode 6.

From the above analysis, it can be seen that the shoot-through states are evenly inserted between the active states and the traditional zero states. The zero states freewheel only through S1 and S3.

 

III. LEAKAGE CURRENT ANALYSIS OF THE ZSI-TL

A. Model of the CM Voltage

Fig. 4(a) shows the CM model for the ZSI-TL including the most significant stray elements. The most important stray elements that influence the leakage current dynamics include the stray capacitance between the PV array and the ground CPVg and the series impedance between the ground connection points of the inverter and the grid Zpg. The leakage current icm flows through the closed-loop path consisting of CPVg, the Z-source network, the bridge, the filters (Lac1 and Lac2), the utility grid, and Zpg. Without Zpg considered, the total CM voltage vtcm is defined as:

where vAN represents the voltage between terminal (A) and terminal (N), and vBN represents the voltage between terminal (B) and terminal (N).

Fig. 4.Common-mode model for ZSI-TL. (a) Full model. (b) Simplified model.

From (5), if Lac1 = Lac2, the total CM voltage is only relevant to vAN and vBN. The CM voltage vcm can be given by the following:

vAN and vBN are determined by the PWM strategy of the ZSI-TL. Therefore, vAN and vBN can be regarded as the controlled-voltage sources connected to the negative terminal of the PV array, namely a square-wave voltage sources with a switching frequency. The simplified circuit of Fig. 4(b) is finally obtained. SW1 and SW2 represent the diodes of the ZSI-TL. SW1 and SW2 are ON during the non-shoot-through states, and they are OFF during the shoot-through states. L12 is obtained by the following:

In the active modes (Mode 3 and Mode 6), the CM voltage can be expressed as:

where vAN = VC and vBN = VPV - VC (Taking Mode 3 as an example.).

In the freewheeling modes (Mode 1 and Mode 4), the CM voltage can be obtained as:

where

In the shoot-through modes (Mode 2 and Mode 5), the sum of the two Z-source capacitors’ voltage is greater than the output voltage of the PV panel. Therefore, the diodes D1 and D2 are reverse biased. SW1 and SW2 are OFF so that the path for the leakage current is blocked.

According to the above analysis, because the CM voltage is kept constant during the non-shoot-through states and the discharge path of the CM voltage is blocked during the shoot-through states, the leakage current is avoided.

B. Influence of the Junction Capacitances

In the active mode, the dc and ac sides of the inverter are directly connected by the filter inductors. The operation states and the common-mode voltage are not affected by the junction capacitance of the switches. In the freewheeling mode, the PV panel is disconnected from the grid by S5, and the CM voltage is affected by the junction capacitances of the switches. In the shoot-through mode, because the path of the leakage current is blocked, the influence of the junction capacitances will not be considered. Therefore, when the inverter commutates from the shoot-through mode to the freewheeling mode, the slope of the voltages vAN and vBN depends on the junction capacitance of the switches, and the CM voltage vcm is accordingly affected.

Taking the commutation from Mode 2 to Mode 1 as an example, there are two stages. The other commutation, from Mode 5 to Mode 4, is similar due to the symmetry of the operation modes.

Stage I: Fig. 5 shows the transient circuit of the commutation from Mode 2 to Mode 1, where CD1 and CD2 represent the junction capacitances of the diodes D1 and D2, C1~C5 represent the junction capacitors of the switches S1~S5 and D3 represents the anti-parallel freewheeling diode of S3. When S4 and S5 are turned OFF, the two charging or discharging circuits are composed of the junction capacitors C2, C4 and C5. According to Kirchhof’s current law, the following current equations can be obtained:

where i1 and i2 represent the currents of the two charging or discharging circuits; iD3 is the current of D3; and iC2 , iC4 and iC5 are the currents of C2, C4 and C5, respectively.

Fig. 5.Transient circuit of commutation from Mode 2 to Mode 1. (a) Transient circuit. (b) Equivalent circuit from Mode 2 to Mode 1. (c) Equivalent circuit at the end of Stage 1.

From (10) to (12), the formula can be derived as follows:

Assuming that the acquired charge of CD2 is equal to the discharged charge of CD1, an equivalent circuit model for the transient state can be obtained in Fig. 5(b), where the initial potentials in stage 1 are indicated in the brackets (the node N’ is used as a reference potential). It is obvious that the junction capacitors C2 and C4 are charged by C5 in parallel through the filter inductors Lac1 and Lac2. Thus, the voltages vAN and vBN rises until their values are equal to VPV/2, and the transient process on Stage 1 ends. Fig. 5(c) shows an equivalent circuit model at the end of Stage 1. Based on the charge conservation, it can be found that:

As a result, the relation of the junction capacitors can be obtained as:

Stage II: Fig. 6 shows a potential resonant circuit in Mode 1 according to (15). The voltages vAN and vBN become VPV/2 synchronously only if C5= C2+C4 at the end of transient state I. Therefore, the CM voltage can still remain VPV/2. The modified inverter can operate normally in Mode 1, and the condition for eliminating the leakage current is met as analyzed earlier.

Fig. 6.Potential resonant circuit in Mode 1.

 

IV. POWER LOSS CALCULATION AND ANALYSIS

A. Conduction Losses Analysis

Assuming that the output current is sinusoidal:

where iac is the output current, and ICM is the peak value of the output current.

The conduction losses of S1 can be obtained in the positive half cycle as:

where VCEO is the saturation voltage drop, ICN is the rated current, and VCEN is the collector-to-emitter voltage at the rated current. This implies a threshold voltage plus a resistance drop.

In the negative half cycle, the conduction losses of S1 during the shoot-through time interval are:

where IL is the Z-source inductor current.

Another part of the conduction losses of S1 is induced by the conduction of the body diode in the negative half cycle.

where VFO is the saturation voltage drop, and VFN is the diode voltage drop at the rated current.

Thus, the average conduction losses of S1 are:

In a similar way, the average conduction losses of S2 can be given as:

where:

According to Fig. 2, the conduction losses of S3 are equal to those of S1, and the conduction losses of S4 are equal to those of S2. In addition, the conduction losses of S5 are the sum of S2 and S4. Therefore, the conduction losses of the switches are:

B. Switching Losses Analysis

The turn-on losses, turn-off losses and recovery power losses of S1 can be calculated from (23) to (25), respectively.

where fS is the switching frequency, and trN and tfN are the rise and fall times of the switch at a rated current, respectively. trrN is the diodes reverse recovery time, and IrrN is the peak reverse recovery current.

Thus, the switching losses of S1 can be expressed as follows:

In a similar way, the average switching losses of S2 can be given as:

The switching losses of S3 are equal to those of S1, and the switching losses of S4 are equal to those of S2. In addition, the switch state of S5 is the same as that of S4 in the positive cycle and it is also the same as that of S2 in the negative cycle. However, the voltage across S5 is doubled when compared with S2 or S4. As a result, the switching losses of S5 are quadrupled when compared with S2. The total switching losses of the switches are:

By substituting the parameters from the datasheets of an IRGP4062DPbF [25], the total losses with the change of the switching frequency are calculated. The efficiency evaluation of the ZVI-TL is shown in Fig. 7. The output power of the PV inverter is 1kW. VPV=320V, Vg=220V, M=0.775, and d0=0.1. When the switching frequency is low, the switching losses are not the main source of the power losses. However, as the switching frequency increases, the distribution of the switching losses increases gradually and becomes the main source of power losses. A lower switching frequency leads to a high total harmonic distortion (THD) of the output current. Therefore, in view of the quality of the output current and the switching losses, a compromised switching frequency of 10kHz is selected in this paper.

Fig. 7.Power switches loss distribution for ZSI-TL.

 

V. EXPERIMENTAL RESULTS

A 1kW prototype circuit has been designed and tested to verify the performance of the proposed ZVS-TL topology.

The detailed components and parameters are as follows: input voltage, VPV=320V; Z-source capacitor voltage, VC=360V; Z-source capacitor, CZ1=CZ2=940μF; Z-source inductor, LZ1=LZ2=4mH; filter inductor, Lac1=Lac2=4.5mH; grid voltage, Vg =220Vac; grid frequency, fg=50Hz; switching frequency, fS=10kHz; parasitic capacitor, CPVg=0.1μF; power switches, S1–S5= IRGP4062DPbF; and junction capacitors of the switches, C1–C5=84pF.

The experimental gating signals in a grid cycle are shown in Fig. 8. It can be seen that the experimental gating signals us1, us2 and us5 agree with the analysis results of the PWM scheme, and that the gating signals of us2 and us5 are synchronized well in the negative half cycle.

Fig. 8.Gating signals of switches.

According to the principle of the junction capacitors, one additional capacitor with a value of 84pF should be paralleled to S5. In addition, a capacitor with a values of 82pF is applied in this prototype circuit. Because Zpg is very small, it is not considered. The CM voltage and the leakage current waveforms of the ZVI-TL with a paralleled capacitor in the grid-cycle and in the PWM cycle are shown in Fig. 9(a) and Fig. 9(b). The yellow highlighted sections represent the shoot-through states. From (8) and (9), vAN=360V, vBN= -40V in Mode 3, and vAN=vBN=160V in mode 1. By choosing a reasonable value for the paralleled capacitor, 82pF, vAN=vBN=0.5VPV is obtained at the ending point of the transient process from the shoot-through mode to the freewheeling mode. Thus, vcm is maintained at approximately VPV/2. The leakage current icm is successfully limited to a very small value that is less than 70mA for the peak value and less than 50mA for the rms value. This complies with the DIN V VDEV 0126-1-1 standard.

Fig. 9.Experimental waveforms of CM voltage and leakage current with paralleled capacitor. (a) Experimental waveforms in the grid cycle. (b) Experimental waveforms in the PWM cycle.

Fig.10 shows the CM voltage and the leakage current waveforms of the ZVI-TL without a paralleled capacitor. It can be seen that the leakage current with a paralleled capacitor is less than that without a paralleled capacitor.

Fig. 10.Experimental waveforms of CM voltage and leakage current without paralleled capacitor. (a) Experimental waveforms in the grid cycle. (b) Experimental waveforms in the PWM cycle.

Fig. 11 shows the dc-link voltage vFF’, the collector-emitter voltage vS5 of S5, and the Z–source inductor current iL waveforms. It is clear that iL increases in the shoot-through mode and decreases in the non-shoot-through mode. In the freewheeling modes, S5 is OFF and vS5 is equal to 200V.

Fig. 11.Experimental waveforms of vFF’, vS5 and iL.

Fig. 12 shows the grid current and voltage waveforms. The grid-connected current is highly sinusoidal and synchronized with the grid voltage. The experimental efficiency of the Z-source PV grid-connected inverter is shown in Fig. 13. The maximum efficiency is 95.15%, including the main circuit, control board, and auxiliary power. Fig. 14 shows a photograph of the proposed inverter.

Fig. 12.Experimental waveforms of vg and iac.

Fig. 13.Measured efficiency of ZVI-TL.

Fig. 14Photograph of the proposed inverter.

 

VI. CONCLUSION

A modified transformerless Z-source PV grid-connected inverter has been proposed in this paper. The proposed inverter has the following characteristics: (i) a decoupling switch and two reversed-biased diodes are used to eliminate the leakage current, (ii) a modified PWM strategy is implemented, which ensures a single power device switching per state transition, and retain all of the harmonic benefits of conventional modulation strategies, (iii) no shoot-through issue leads to a greatly enhanced reliability, and (iv) a low ac output current distortion can be achieved because there is no dead time. These factors make the modified Z-source inverter suitable for high efficiency and low leakage current transformerless PV grid-connected applications. Finally, experimental results obtained with a 1 kW hardware prototype verify the effectiveness of the proposed inverter.