• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.719-720
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• 2010

• 한국신재생에너지학회:학술대회논문집
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• 2007.11a
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• pp.233-233
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• 2007

• Proceedings of the Optical Society of Korea Conference
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• 1997.08a
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• pp.15-15
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• 1997

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.995-997
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• 2005

A plastic substrate for flexible display is developed. The gas barrier and optical properties of the substrate is improved through depositing silicon oxide/nitride layer and coating polymer layer on plastic film by sputtering process and wet coating process. Roll to roll processes will guarantee the productivity in the whole production process of the plastic substrate.

• Journal of Integrative Natural Science
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• v.5 no.4
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• pp.211-215
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• 2012

Single-crystalline silicon nanowire arrays (SiNWAs) using electroless metal-assisted etchings of p-type silicon were successfully fabricated. Ag nanoparticle deposition on silicon wafers in HF solution acted as a localized micro-electrochemical redox reaction process in which both anodic and cathodic process took place simultaneously at the silicon surface to give SiNWAs. The growth effect of SiNWs was investigated by changing of etching times. The morphologies of SiNWAs were obtained by SEM observation. Well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. Optical characteristics of SiNWs were measured by FT-IR spectroscopy and indicated that the surface of SiNWs are terminated with hydrogen. The thicknesses and lengths of SiNWs are typically 150-250 nm and 2 to 5 microns, respectively.

• Bulletin of the Korean Chemical Society
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• v.32 no.12
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• pp.4392-4396
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• 2011

Porous silicon with a complex network of nanopores is utilized for photoelectrochemical energy conversion. A novel electroless Pt deposition onto porous silicon is investigated in the context of photoelectrochemical hydrogen generation. The electroless Pt deposition is shown to improve the characteristics of the PS photoelectrode toward photoelectrochemical $H^+$ reduction, though excessive Pt deposition leads to decrease of photocurrent. Furthermore, it is found that a thin layer (< 10 ${\mu}m$) of porous silicon can serve as anti-reflection layer for the underlying Si substrate, improving photocurrent by reducing photon reflection at the Si/liquid interface. However, as the thickness of the porous silicon increases, the surface recombination on the dramatically increased interface area of the porous silicon begins to dominate, diminishing the photocurrent.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.147-150
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• 2003

In this paper, We fabricated a high temperature pressure sensor using SBD(silicon- direct-bonding) wafer of $Si/SiO_2$/Si-sub structure. This sensor was very sensitive because the piezoresistor is fabricated by single crystal silicon of the first layer of SDB wafer. Also, it was possible to operate the sensor at high temperature over $120^{\circ}C$ which is the temperature limitation of general silicon sensor because the piezoresistor was dielectric isolation from silicon substrate using silicon dioxide of the second layer. The sensitivity of this sensor is very high as the measured result of D2200 shows $183.6\;{\mu}V/V{\cdot}kPa$. Also, the output characteristic of linearity was very good. This sensor was available at high temperature as $300^{\circ}C$.

• Journal of Sensor Science and Technology
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• v.13 no.3
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• pp.175-181
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• 2004

A pressure sensor for high temperature was fabricated by using a SDB(Silicon-Direct-Bonding) wafer with a Si/$SiO_{2}$/ Si structure. High pressure sensitivity was shown from the sensor using a single crystal silicon of the first layer as a piezoresistive layer. It also was made feasible to use under the high temperature as of over $120^{\circ}C$, which is generally known as the critical temperature for the general silicon sensor, by isolating the piezoresistive layer dielectrically and thermally from the silicon substrate with a silicon dioxide layer of the second layer. The pressure sensor fabricated in this research showed very high sensitivity as of $183.6{\mu}V/V{\cdot}kPa$, and its characteristics also showed an excellent linearity with low hysteresis. This sensor was usable up to the high temperature range of $300^{\circ}C$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.1
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• pp.49-57
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• 2002

Including RF Package inductance, substrate coupling through conductive silicon(Si)-substrate is modeled and quantitatively characterized. 2-port substrate coupling model is extended for the characterization of multi-port substrate coupling between digital circuit block and analog/RF circuit block. Furthermore, scalable parameter extraction model is developed. Multi-port substrate coupling can be investigated by linearly superposing a frequency-dependent 2-port substrate coupling model using scalable parameters. In addition, Substrate coupling including RF package inductance effect is quantitatively investigated. It is shown that package effect increases substrate coupling and shifts a characteristic frequencies(i.e., poles) to the higher frequency range. The proposed methodology can be efficiently used to the mixed-signal circuit performance verification.

• Korean Journal of Materials Research
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• v.17 no.4
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• pp.207-214
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• 2007

We fabricated thermally-evaporated 10 -Ni/(poly)Si and 10 -Ni/1 -Ir/(poly)Si structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required for annealing. Silicides underwent rapid at the temperatures of 300-1200 for 40 seconds. Silicides suitable for the salicide process formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope(TEM) and an Auger depth profile scope were employed for the determination of vertical section structure and thickness. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates shoed low resistance up to 1000 and 800, respectively, while the conventional nickle monosilicide showed low resistance below 700. Through TEM analysis, we confirmed that a uniform, 20 -thick silicide layer formed on the single-crystal silicon substrate for the Ir-inserted case while a non-uniform, agglomerated layer was observed for the conventional nickel silicide. On the polycrystalline silicon substrate, we confirmed that the conventional nickel silicide showed a unique silicon-silicide mixing at the high silicidation temperature of 1000. Auger depth profile analysis also supports the presence of thismixed microstructure. Our result implies that our newly proposed iridium-added NiSi process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.