• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.41.2-41.2
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• 2010

최근 태양전지 제조비용 절감을 위해 초박형 실리콘 태양전지 개발이 활발히 이루어지고 있다. 이에 따라 후면전계(Back Surface Field, BSF) 특성에 대한 관심이 높아지는 추세이다. 이에 본 연구에서는 후면의 결정방향 및 표면구조에 따라 형성되는 후면전계(BSF)의 특성에 대해 알아보고자 하였다. 후면이 절삭손상층 식각(Saw damage etching) 후 (100)면이 드러난 실리콘 기판과 텍스쳐링(Texturing) 후 (111)면이 드러난 실리콘 기판에 후면 전극을 스크린 인쇄 후 Ramp up rate을 달리 하여 소성 공정(RTP system)을 통해 후면전계(BSF)를 형성하여 비교하였다. 후면전계(BSF)의 형상과 특성만을 평가하기 위하여 염산을 이용하여 후면 전극층을 제거하였다. 후면 전극 제거 후 주사전자현미경(Scanning Electron Microscopy)과 3차원 미세형상측정기(Non-contacting optical profiler)로 후면전계(BSF)의 형상을 비교하였다. 또한 후면전계(BSF)의 특성을 평가하고자 Quasi-Steady-State Photo Conductance(QSSPC)를 사용하여 포화전류(Saturation current, $J_0$)을 측정하였고, 면저항 측정기(4-point probe)로 면저항을 측정하여 비교하였다. 후면 전계(BSF)는 (100)면과 (111)면에서 모두 Ramp up rate이 빠를수록 향상된 특성을 보였고, (111)면에서 더 큰 차이를 보였다.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.2
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• pp.157-161
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• 1999

We investigated the effect of mechanical back side damage in Czochralski silicon wafer. The intensity of mechanical damage was evaluated by minority carrier recombination lifetime by laser excitation/microwave reflection photoconductance decay ($\mu$-PCD) technique, wet oxidation/preferential etching methods, near surface micro defect (NSMD) analysis, and X-ray section topography. The data indicate that the higher the mechanical damage intensity, the lower the minority carrier lifetime, and NSMD density increased proportionally, also correlated to the oxidation induced stacking fault (OISF) density. Thus, NSMD technique can be used separately from conventional etching method in OISF measurement.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.180-182
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• 2009

Two different wet etching solutions, NaOH 40% and Acid, were used for etching in tri-crystalline Silicon(Tri-Si) solar cell fabrication. The wafers etched in NaOH40% solution showed higher reflectance compared to the wafers etched in Acid solution after $SiN_x$ deposition. In light current-voltage results, the cells etched in Acid solution exhibited higher short circuit current and open circuit voltage than those of the cells etched in NaOH 40% solution. We have obtained 16.70% conversion efficiency in large area($156cm^2$) Tri-Si solar cells etched in Acid solution.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.511-515
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• 2013

A Monte Carlo (MC) simulation study has been done in order to investigate the effects of line-edge-roughness (LER) induced by either 1P1E (single-patterning and single-etching) or 2P2E (double-patterning and double-etching) on fully-depleted silicon-on-insulator (FDSOI) tri-gate metal-oxide-semiconductor field-effect transistors (MOSFETs). Three parameters for characterizing the LER profile [i.e., root-mean square deviation (${\sigma}$), correlation length (${\zeta}$), and fractal dimension (D)] are extracted from the image-processed scanning electron microscopy (SEM) image for each photolithography method. It is experimentally verified that two parameters (i.e., ${\sigma}$ and D) are almost the same in each case, but the correlation length in the 2P2E case is longer than that in the 1P1E case. The 2P2E-LER-induced $V_TH$ variation in FDSOI tri-gate MOSFETs is smaller than the 1P1E-LER-induced $V_TH$ variation. The total random variation in $V_TH$, however, is very dependent on the other major random variation sources, such as random dopant fluctuation (RDF) and work-function variation (WFV).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.6-14
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• 2012

For integrated complementary metal oxide semiconductor (CMOS) circuits, the lateral spread for two-dimensional (2-D) impurity distributions are very important for the analyzing the devices. The measured two-dimensional SEM data obtained using the chemical etching-method matched very well with the results of the Gauss model for boron implanted samples. But the profiles in boron implanted silicon were deviated from the Gauss model. The profiles in boron implanted silicon were shown a little bit steep profile in the deep region due to backscattering effect on the near surface from the bombardments of light boron ions. From the simulated 3-D data obtained using an analytical model, the 1-D and 2-D data were compared with the experimental data and could be verified the justification from the experimental data. The data of 3-D model were also shown good agreements with the experimental and the simulated data. It can be used in the 3-D chip design and the analysis of microelectro-mecanical system (MEMS) and special devices.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.1825-1828
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• 2008

A simple method for the fabrication of porous nano-master for antireflective surface is presented. In conventional fabrication methods for antireflective surface, coating method with low refractive index has usually been used. However, it is required to have high cost and long times for mass production. In this paper, we suggested the fabrication method of antireflective surface by the hot embossing process using the porous nano patterned master on silicon wafer fabricated by low-temperature anodic aluminum oxidation. Through multi-AAO and etching processes, nano patterned master with high aspect ratio was fabricated at the large area. Pore diameter and inter-pore distance are about 150nm and from 150 to 200nm. In order to replicate anti-reflective structure, hot embossing process was performed by varying the processing parameters such as temperature, pressure and embossing time etc. Finally, antireflective surface can be successfully obtained after etching process to remove selectively silicon layer of AAO master.

• Korean Journal of Materials Research
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• v.23 no.6
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• pp.322-328
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• 2013

The relationship the between electrical properties and surface roughness (Ra) of a wet-etched silicon wafer were studied. Ra was measured by an alpha-step process and atomic force microscopy (AFM) while varying the measuring range $10{\times}10$, $40{\times}40$, and $1000{\times}1000{\mu}m$. The resistivity was measured by assessing the surface resistance using a four-point probe method. The relationship between the resistivity and Ra was explained in terms of the surface roughness. The minimum error value between the experimental and theoretical resistivities was 4.23% when the Ra was in a range of $10{\times}10{\mu}m$ according to AFM measurement. The maximum error value was 14.09% when the Ra was in a range of $40{\times}40{\mu}m$ according to AFM measurement. Thus, the resistivity could be estimated when the Ra was in a narrow range.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.58-62
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• 2003

Silicon carbide (SiC) was etched in a $NF_3/CH_4$ inductively coupled plasma. The etch process was modeled by using a neural network called generalized regression neural network (GRNN). For modeling, the process was characterized by a $2^4$ full factorial experiment with one center point. To test model appropriateness, additional test data of 16 experiments were conducted. Particularly, the GRNN predictive capability was drastically improved by a genetic algorithm (GA). This was demonstrated by an improvement of more than 80% compared to a conventionally obtained model. Predicted model behaviors were highly consistent with actual measurements. From the optimized model, several plots were generated to examine etch rate variation under various plasma conditions. Unlike the typical behavior, the etch rate variation was quite different depending on the bias power Under lower bias powers, the source power effect was strongly dependent on induced dc bias. The etch rate was strongly correated to the do bias induced by the gas ratio. Particularly, the etch rate variation with the bias power at different gas ratio seemed to be limited by the etchant supply.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.23 no.6
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• pp.533-538
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• 2014

We fabricated grooved mushroom structures with anisotropic wettability on silicon substrates using basic MEMS processes. The geometry of these grooved mushroom structures could be changed by controlling the additional IPA solution during Si etching by TMAH solution. To understand anisotropic wettability, contact angles (CAs) of hexadecane droplets were measured in the orthogonal and parallel directions to grooved lines. The CA measurement results displayed anisotropic wetting on the grooved mushroom structures. However, specimens with $80{\mu}m$ distance between top layers displayed isotropic and superoleophobic wetting. This study demonstrates that the thickness of the top layer is more critical than the width or height of the ridge when determining the wettability of organic solvent. Despite the wide distance between top layers ($80{\mu}m$), the specimen with a thin top layer (100 nm) showed highly anisotropic wetting and low CA due to the pinning of droplets at the edge of the top layer.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.22 no.3_1spc
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• pp.544-550
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• 2013

A grooved surface with anisotropic wettability was fabricated on a silicon substrate using photolithography, reactive ion etching, and a KOH etching process. The contact angles (CAs) of water droplets were measured and compared with the theoretical values in the Cassie state and Wenzel state. The experimental results showed that the contact area between a water droplet and a solid surface was important to determine the wettability of the water. The specimens with native oxide layers presented CAs ranging from $71.6^{\circ}$ to $86.4^{\circ}$. The droplets on the specimens with a native oxide layer could be in the Cassie state because they had relatively smooth surfaces. However, the CAs of the specimens with thick oxide layers ranged from $33.4^{\circ}$ to $59.1^{\circ}$. This indicated that the surface roughness for a specimen with a relatively thick oxide layer was higher, and the water droplet was in the Wenzel state. From the CA measurement results, it was observed that the wetting on the grooved surface was anisotropic for all of the specimens.