• Journal of Sensor Science and Technology
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• v.26 no.3
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• pp.155-159
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• 2017

The analog-to-digital converter (ADC) is an important component in various fields of sensor signal processing. This paper presents an expandable flash analog-to-digital converter (E-flash ADC) for sensor signal processing using a comparator, a subtractor, and a multiplexer (MUX). The E-flash ADC was simulated and designed in $0.35-{\mu}m$ standard complementary metal-oxide semiconductor (CMOS) technology. For operating the E-flash ADC, input voltage is supplied to the inputs of the comparator and subtractor. When the input voltage is lower than the reference voltage, it is outputted through the MUX in its original form. When it is higher than the reference voltage, the reference voltage is subtracted from the input value and the resulting voltage is outputted through the MUX. Operation of the MUX is determined by the output of the comparator. Further, the output of the comparator is a digital code. The E-flash ADC can be expanded easily.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.1
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• pp.33-41
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• 2019

We propose an embedded solution to design a high-speed and high-accuracy 16bit analog-digital signal processing interface for the control systems using various external analog signals. Choosing TMS320F28377D micro controller unit (MCU) featuring high-performance processing in the 32-bit floating point operation, low power consumption, and various I/O device supports, we design and build the proposed system that supports both 16-bit analog-digital converter (ADC) interface and high precision digital-analog converter (DAC) interface. The ADC receives voltage-level differential signals from fully differential amplifiers, and the DAC communicates with MCU through 50 MHz bandwidth high-fast serial peripheral interface (SPI). We port the boot loader and device drivers to the implemented board, and construct the firmware development environment for the application programming. The performance of the entire implemented system is demonstrated by analog-digital signal processing tests, and is verified by comparing the test results with those of existing similar systems.

• Journal of the Korea Society of Computer and Information
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• v.7 no.4
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• pp.115-120
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• 2002

This paper presents the implementation of IS-95 CDMA signal processor, baseband and Intermediate Frequency(IF) digital converter using Field Programmable Gate Array(FPGA) and ADC/DAC and frequency up/down converter IS-95 CDMA channel processor is generated the pilot channel signal with short PN code and Walsh-code generator. The digital If is composed of FPGA. digital transmit/receive signal processor and high speed analog-to-digital converter(ADC) and digital-to-analog converter(DAC). The frequency up/down converter consisted of filter, mixer, digital attenuator and PLL is analog conversion between intermediate frequency(IF) and baseband. This implemented system can be deployed in the IS-95 CDMA base station device etc.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.3
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• pp.70-75
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• 2002

This paper proposes new single stage power factor correction (PFC) full bridge converter. The proposed converter is combined previous ZVS full bridge DC/DC converter with two inductors, two diodes, two magnetic coupling transformer for PFC. This process of power is isolated from the source and also regulate stable DC output voltage in a category. In this topology, the voltage stress of main switches is reduced by zero voltage switching. Moreover, the proposed converter doesn't need active PFC switch and auxiliarly circuits, like control and gating board, so it could decrease the size and cost and increase the efficiency.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.3
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• pp.205-210
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• 2007

This paper presents a CMOS TIQ flash A/D converter which operates very fast compared to other types of A/D converters due to its parallel architecture. The output resolution of designed A/D converter is 6-bit. In order to reduce the power consumption and chip area of conventional flash A/D converter, TIQ based flash A/D converter is proposed, which uses the advantage of the structure of CMOS transistors. The length and width of transistors of TIQ were determined with HSPICE simulation. To speed up the ultra-high speed flash A/D converter, the Fat Tree Encoder technique is used. The TIQ A/D converter was designed with full custom method. The chip's maximum power consumption was 38.45mW at 1.8V, and the operating speed of simulation was 2.7 GSPS.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.395-401
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• 2015

This paper proposes a new bidirectional DC-DC converter with high efficiency. The proposed converter is composed of a flyback and a tapped-inductor boost converter to satisfy extreme operating conditions with low cost. The outputs are connected in series to achieve a high-voltage step-up. In the reverse direction, the proposed converter has an extreme step-down voltage. In this study, the proposed converter was employed with a 100 W hardware prototype. To design the controller, a small-signal transfer function of the proposed converter is derived. For PV power conditioning systems, a maximum power point tracking method is applied with perturb and observe method. To verify the operation of the bidirectional power flow, the current controller is applied. All of the controllers are employed with a digital signal processor.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.4
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• pp.307-316
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• 2001

In this paper, the multiple output forward converter forPC power supply with weighted voltage mode control which improves the characteristics of DC and transient responses is analyzed and designed. The power stage model of this converter including all the major parasitic components is derived and the small signal model is also derived. Determination of the weighting factors and a design procedure for the loop compensation are presented. Finally, the proposed controller is verified through the simulation of three output forward converter with SABER, and the experiment.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.11
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• pp.1441-1447
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• 1999

A discrete time domain modeling is presented for the pulse-width modulated series resonant converter (PWM-SRC) with a discontinuous current mode. This nonlinear system is linearized about its equilibrium state to obtain a linear discrete time model for the investigation of small signal performances such as the stability and transient response. The usefulness of this small signal model is verified through the dynamic simulation.

• 제어로봇시스템학회:학술대회논문집
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• 1991.10a
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• pp.131-135
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• 1991

A quantization error model is suggested for analog to frequency(A/F) converter in strapdown inertial navigation system(SDINS),which is characterized by some white noise exciting the state variables. Also, effects on the performance of SDINS by analog to digital(A/D) converter and A/F converter are analyzed and compared via covariance simulation. As a result, A/F converter turns out to be superior to the A/D converter with respect to the induced navigation error and the difficulty in circuit realization. The quantization error model developed in this paper appears to be useful for optimal filter design.

• Smart Structures and Systems
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• v.3 no.1
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• pp.1-22
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• 2007

The energy efficiency of a self-powered wireless sensing system for pressure monitoring in injection molding is analyzed using Bond graph models. The sensing system, located within the mold cavity, consists of an energy converter, an energy modulator, and a ultrasonic signal transmitter. Pressure variation in the mold cavity is extracted by the energy converter and transmitted through the mold steel to a signal receiver located outside of the mold, in the form of ultrasound pulse trains. Through Bond graph models, the energy efficiency of the sensing system is characterized as a function of the configuration of a piezoceramic stack within the energy converter, the pulsing cycle of the energy modulator, and the thicknesses of the various layers that make up the ultrasonic signal transmitter. The obtained energy models are subsequently utilized to identify the minimum level of signal intensity required to ensure successful detection of the ultrasound pulse trains by the signal receiver. The Bond graph models established have shown to be useful in optimizing the design of the various constituent components within the sensing system to achieve high energy conversion efficiency under a compact size, which are critical to successful embedment within the mold structure.