• Journal of the Korean Crystal Growth and Crystal Technology
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• v.11 no.1
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• pp.38-42
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• 2001

Electric and dielectric(Ba,Sr)$TiO_3$[BST] thin films for emtal-Insulator-Semiconductor(MIS) capacitors have been studied. BST thin films wre deposted on p-Si(100) substrates bythe RF magnetron sputtering with tempratue range of 500~$600^{\circ}C$. The dielectric properties of MIS capacitors consisting of Al/BST/$SiO_2$/Si sandwich structure were evaluated ot redcue the leakage current density. The charge state densities of the MIS capacitors were determined by high frequency (1 MHz) C-V measurement. In order to reduce the leakage current in MIS capacitor, high quality $SiO_2$ layer was deposited on bare p-Si substrate. Depending on the oxygen pressure and substrate temperature both positive and negative polarities of effective oxide charge in the MIS capacitors were evaluated. It is considered that the density of electronic states, generated at the BST/$SiO_2$/p-Si interface due to the asymmetric structure within BST/$SiO_2$/Si structure, and the oxygen vacancy content has influence on the behavior of oxide charge.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.05a
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• pp.42-45
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• 1992

The poly silicon thin films were prepared by solid phase crystallization at 600$^{\circ}C$ of amorphous silicon films deposited on Corning 7059 glass and (100) silicon wafer with thermally grown SiO$_2$substrate by plasma enhanced chemical vapor deposition with varying rf power, deposition temperature, total flow rate. Crystallization time, microstructure, absorption coefficients were investigated by RAMAN, XRD analysis and UV transmittance measurement. Crystallization time of amorphous silicon films was increased with increasing rf power, decreasing deposition temperature and decreasing total flow rate.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2007.11a
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• pp.7-9
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• 2007

Thin films of CrAlSiN were deposited on SKD11 tool steel substrate using Cr and AlSi cathodes by a cathodic arc plasma deposition system. The influence of process parameters on the deposited film properties were investigated. The oxidation characteristics of the films were studied at temperatures ranging from 800 and 1000+C up to 50 h in air. The films showed superhardness and good oxidation resistance..

• Electrical & Electronic Materials
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• v.9 no.9
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• pp.911-917
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• 1996

Platinum thin films were deposited on Si-wafer by DC rnagnetron sputtering for RTD (resistance thermometer devices). We investigated the physical and electrical characteristics of these films under various conditions, the input power, working vacuum, temperature of substrate and also after annealing these films. The deposition rate was increased with increasing the input power but decreased with increasing Ar gas pressure. The resistivity and sheet resistivity were decreased with increasing the temperature of substrate and the annealing time at 1000.deg. C. At substrate temperature of >$300^{\circ}C$, input power of 7 w/cm$^{2}$, working vacuum of 5 mtorr and annealing conditions of 1000.deg. C and 240 min, we obtained 10.65.mu..ohm..cm, resistivity of Pt thin films and 3800-3900 ppm/.deg. C, TCR(temperature coefficient of resistance). These values are close to the bulk value. These results indicate that the Pt thin films deposited by DC magnetron sputtering have potentiality for the development of Pt RTD temperature sensor.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1427-1429
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• 2001

Polycrystalline silicon(poly-Si) films are deposited on low temperature glass substrate by Hot-Wire CVD(HWCVD). The structural properties of the poly-Si films are strongly dependent on the wire temperature($T_w$). The films deposited at high $T_w$ of 2000$^{\circ}C$ have superior crystalline properties; average lateral grain sizes are larger than $1{\mu}m$ and there at·e no vertical grain boundaries. The surface of the high $T_w$ samples are naturally textured like pyramid shape. These large grain size and textured surface are believed to give high current density when applied to solar cells. However, the poly-si films are structurally porous and contains high defect density, by which high concentration of C and O resulted within the films by air-penetration after removed from chamber.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.12
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• pp.1332-1336
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• 2004

Amorphous carbon (a-C) films have been deposited on Si(100) substrate using RF magnetron system in order to investigate the electron field emission properties. The a-C films were treated by $N_2$ gas plasma at room temperature. Surface morphologices and structural properties of the a-C films before and after $N_2$ plasma treatment were observed by scanning electron microscopy and Raman spectroscope, respectively. Structural properties and surface morphology of the a-C films were changed by $N_2$ plasma treatment. The emission properties can be improved by the plasma treatment according to the contents of nitrogen on the a-C films which is varied by plasma treatment time. Before the plasma treatment, the a-C films are found to have a threshold field of 14 V/$\mu$m, but the a-C film treated by $N_2$ plasma for 30 min exhibit threshold field as low as 6.5 V/$\mu$m.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.8
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• pp.651-654
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• 2010

This paper describes the thermal and mechanical properties of doped thin film 3C-SiC and porous 3C-SiC. In this work, the in-situ doped thin film 3C-SiC was deposited by using atmospheric pressure chemical vapor deposition (APCVD) method at $120^{\circ}C$ using single-precursor hexamethyildisilane: $Si_2(CH_3)_6$ (HMDS) as Si and C precursors. 0~40 sccm $N_2$ gas was used as doping source. After growing of doped thin film 3C-SiC, porous structure was achieved by anodization process with 380 nm UV-LED. Anodization time and current density were fixed at 60 sec and 7.1 mA/$cm^2$, respectively. The thermal and mechanical properties of the $N_2$ doped porous 3C-SiC was measured by temperature coefficient of resistance (TCR) and nano-indentation, respectively. In the case of 0 sccm, the variations of TCR of thin film and porous 3C-SiC are similar, but TCR conversely changed with increase of $N_2$ flow rate. Maximum young's modulus and hardness of porous 3C-SiC films were measured to be 276 GPa and 32 Gpa at 0 sccm $N_2$, respectively.

• Electrical & Electronic Materials
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• v.9 no.1
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• pp.30-37
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• 1996

Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.9
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• pp.1296-1299
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• 2012

$YBa_2Cu_3O_{7-x}$ thin films were fabricated by the spin-coating method on $SiO_2$/Si substrate using an alkoxide-based sol-gel method. The structural and electrical properties were investigated for various 1st annealing temperature. Due to the formation of the polycrystalline single phase, synthesis temperature was observed at around $720^{\circ}C-800^{\circ}C$. $YBa_2Cu_3O_{7-x}$ thin films with the 1st annealing temperature of $450^{\circ}C{\sim}500^{\circ}C$ showed the single XRD patterns without the second phase, such as $YBa_2Cu_4O_8$. The thickness of films was approximately $0.23{\mu}m{\sim}0.27{\mu}m$. Aerage grain size, resistance and temperature coefficient of resistance (TCR) of $YBa_2Cu_3O_{7-x}$ thin films with the 1st annealing temperature of $500^{\circ}C$ were $0.27{\mu}m$, $59.7M{\Omega}$ and -3.7 %/K, respecvitely.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.136-139
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• 1999

The post-annealing treatments on RF (Radio Frequency) magnetron sputtered PZI(Pb$\_$1.05/(Zr$\_$0.52/, Ti$\_$0.48/)O$_3$thin films(4000${\AA}$) have been investigated. for a structure of PZT/Pt/Ti/SiO$_2$/Si Crystallization pproperties of PZT films were strongly dependent on RTA(Rapid Thermal Annealing) annealing temperature. We were able to obtain a perovskite structure of PZT at a low temperature of 600$^{\circ}C$. P-E curves of Pd/PZT/Pt capacitor annealed at 700$^{\circ}C$ demonstrate typical hysteresis loops. The measured values of P$\_$r/, E$\_$c/, by post annealed at 700$^{\circ}C$ were 12.1 ${\mu}$C/$\textrm{cm}^2$, 120KV/cm respectively.